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參數(shù)資料
| 型號(hào)： | AD1380KD |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ADC SNGL 16BIT 32-CDIP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 50k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 900mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 32-DIP（0.900"，22.86mm） |
| 供應(yīng)商設(shè)備封裝： | 32-BBDIP-H |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 16 個(gè)單端，雙極；16 個(gè)單端，單極 |
AD1380
Rev. D | Page 6 of 12
THEORY OF OPERATION
A 16-bit ADC partitions the range of analog inputs into 216
discrete ranges or quanta. All analog values within a given
quantum are represented by the same digital code, usually
assigned to the nominal midrange value. There is an inherent
quantization uncertainty of ±1/2 LSB associated with the
resolution, in addition to the actual conversion errors.
The actual conversion errors associated with ADCs are
combinations of analog errors due to the linear circuitry,
matching and tracking properties of the ladder and scaling
networks, reference error, and power supply rejection. The
matching and tracking errors in the converter have been
minimized by the use of monolithic DACs that include the
scaling network.
The initial gain and offset errors are specified at ±0.1% FSR for
gain and ±0.05% FSR for offset. These errors may be trimmed
to zero by the use of external trim circuits as shown in Figure 3
and Figure 4. Linearity error is defined for unipolar ranges as
the deviation from a true straight line transfer characteristic
from a zero voltage analog input, which calls for a zero digital
output, to a point that is defined as full scale. The linearity error
is based on the DAC resistor ratios. It is unadjustable and is the
most meaningful indication of ADC accuracy. Differential
nonlinearity is a measure of the deviation in the staircase step
width between codes from the ideal least significant bit step size
(Figure 2).
Monotonic behavior requires that the differential linearity error
be less than 1 LSB. However, a monotonic converter can have
missing codes. The AD1380 is specified as having no missing
codes over temperature ranges noted in the Specifications
section.
There are three types of drift error over temperature: offset, gain
and linearity. Offset drift causes a shift of the transfer
characteristic left or right on the diagram over the operating
temperature range. Gain drift causes a rotation of the transfer
characteristic about the zero for unipolar ranges or the minus
full-scale point for bipolar ranges. The worst-case accuracy drift
is the summation of all three drift errors over temperature.
Statistically, however, the drift error behaves as the root-sum-
squared (RSS) and can be shown as
2
L
O
G
RSS
∈
+
∈
+
∈
=
where:
).
/
(
C
ppm
error
drift
gain
G
°
=
∈
).
/
(
C
FSR
of
ppm
error
drift
offset
O
°
=
∈
).
/
(
C
FSR
of
ppm
error
linearity
L
°
=
∈
00764-002
000 ... 000
ALL BITS ON
GAIN
ERROR
OFFSET
ERROR
ALL BITS OFF
–1/2LSB
+1/2LSB
011 ... 111
111 ... 111
DITIGAL
OUTP
UT
(COB
CODE
)
–FSR
2
ANALOG INPUT
0
+FSR
2
–1LSB
Figure 2. Transfer Characteristics for an Ideal Bipolar ADC
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