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參數(shù)資料
| 型號： | AD1377KD |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC SNGL 16BIT 32-CDIP |
| 標準包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 111k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 800mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 32-DIP（0.900"，22.86mm） |
| 供應商設備封裝： | 32-BBDIP-H |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 16 個單端，雙極；16 個單端，單極 |
AD1376/AD1377
Rev. D | Page 8 of 12
Table 4. Input Scaling Connections
Input Signal Line
Output Code
Connect Pin 26 to
Connect Pin 24 to
Connect Input Signal to
±10 V
COB
Pin 271
Input Signal
Pin 24
±5 V
COB
Pin 271
Open
Pin 25
±2.5 V
COB
Pin 271
Pin 25
0 V to +5 V
CSB
Pin 22
Pin 271
Pin 25
0 V to +10 V
CSB
Pin 22
Open
Pin 25
0 V to +20 V
CSB
Pin 22
Input Signal
Pin 24
1 Pin 27 is extremely sensitive to noise and should be guarded by ANALOG COMMON.
00699-010
22
ANALOG
COMMON
26
BIPOLAR
OFFSET
COMP IN
24
25
27
7.5k
R2
3.75k
10V SPAN
20V SPAN
R1
3.75k
FROM DAC
COMPARATOR
TO
SAR
VREF
Figure 10. Input Scaling Circuit
CALIBRATION (14-BIT RESOLUTION EXAMPLES)
External zero adjustment and gain adjustment potentiometers,
device calibration. To prevent interaction of these two
adjustments, zero is always adjusted first and then gain. Zero is
adjusted with the analog input near the most negative end of the
analog range (0 for unipolar and minus full scale for bipolar
input ranges). Gain is adjusted with the analog input near the
most positive end of the analog range.
0 V to 10 V Range
Set analog input to +1 LSB14 = 0.00061 V. Adjust zero for digital
output = 11111111111110. Zero is now calibrated. Set analog
input to +FSR 2 LSB = 9.99878 V. Adjust gain for
00000000000001 digital output code; full scale (gain) is now
calibrated. Half-scale calibration check: set analog input to
5.00000 V; digital output code should be 01111111111111.
10 V to +10 V Range
Set analog input to 9.99878 V; adjust zero for 1111111111110
digital output (complementary offset binary) code. Set analog
input to 9.99756 V; adjust gain for 00000000000001 digital
output (complementary offset binary) code. Half-scale
calibration check: set analog input to 0.00000 V; digital output
(complementary offset binary) code should be 01111111111111.
00699-
011
–15V
+15V
A
16-BIT SUCCESSIVE
APPROMIXATION REGISTER
16-BIT DAC
REF
CONTROL
3.
75k
3.
75k
24
26
23
19
29
28
22
21
25
eIN
(0V TO +10V)
IIN
KEEP/
REJECT
7.5k
+15V
–15V
ZERO
ADJ
10k
TO
100k
27
IOS = 1.3mA
AD1376/
AD1377
1.8M
1
F
+5V
+
30
+
1
F
+
1
F
+15V
–15V
GAIN
ADJ
10k
TO
100k
300k
0.01
F
NOTE:
ANALOG (
) AND DIGITAL (
) GROUNDS ARE NOT TIED INTERNALLY AND MUST BE CONNECTED EXTERNALLY.
Figure 11. Analog and Power Connections
for Unipolar 0 V to 10 V Input Range
00699-012
–15V
+15V
A
16-BIT SUCCESSIVE
APPROMIXATION REGISTER
16-BIT DAC
REF
CONTROL
3.75k
3.75k
24
26
23
19
29
28
22
21
25
eIN
(–10V TO +10V)
IIN
KEEP/
REJECT
7.5k
+15V
–15V
ZERO
ADJ
10k
TO
100k
27
IOS = 1.3mA
AD1376/
AD1377
1.8M
1
F
+5V
+
30
+
1
F
+
1
F
+15V
–15V
GAIN
ADJ
10k
TO
100k
300k
0.01
F
NOTE:
ANALOG (
) AND DIGITAL (
) GROUNDS ARE NOT TIED INTERNALLY AND MUST BE CONNECTED EXTERNALLY
Figure 12. Analog and Power Connections
for Bipolar 10 V to +10 V Input Range
Other Ranges
Representative digital coding for 0 V to +10 V and 10 V to
+10 V ranges is given in the 0 V to 10 V Range section and
10 V to +10 V Range section. Coding relationships and
calibration points for 0 V to +5 V, 2.5 V to +2.5 V, and 5 V to
+5 V ranges can be found by halving proportionally the
corresponding code equivalents listed for the 0 V to +10 V and
10 V to +10 V ranges, respectively, as indicated in Table 5.
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