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參數(shù)資料
| 型號(hào)： | A65H83181 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| 中文描述： | 128K的× 36 |
| 文件頁(yè)數(shù)： | 16/21頁(yè) |
| 文件大小： | 530K |
| 代理商： | A65H83181 |
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A65H73361/A65H83181 Series
PRELIMINARY
(February, 1999, Version 2.0)
15
AMIC Technology, Inc.
Scan Register Definition
Register Name
Instruction
Bypass
ID
Boundary Scan*
Bit Size X18
3
1
32
51
Bit Size X 36
3
1
32
70
* The Boundary Scan chain consists of the following bits :
36 or 18 bits for Data Inputs Depending on X 18 or X 36 Configuration
15 bits for SA0 - SA14 for X 36, 16 bits for SA0 - SA15 for X 18
4 bits for
SBWa
-
SBWd
in X 36, 2 bits for
SBWa
and
SBWb
X 18
9 bits for CK,
CK
, ZQ,
SS
,
G
,
SW
, ZZ, M1 and M2
6 bits for Place Holders
* CK and
CK
clocks connect to a differential receiver that generates a single-ended clock signal. This signal and its
inverted value are used for Boundary Scan sampling.
ID Register Definition
Field Bit Number and Description
Part
Revision Number
(31 : 28)
Device Density
and Configuration
(27 : 18)
Vender Definition
(17 : 12)
Manufacture JEDEC
Code (11 : 1)
Start
Bit (0)
256K X 18
128K X 36
0001
0001
100 000 0110
011 100 1101
000001
100001
000 101 111 11
000 101 111 11
1
1
Instruction Set
Code
000
001
010
011
100
101
110
111
Instruction
SAMPLE-Z
IDCODE
SAMPLE-Z
PRIVATE
SAMPLE
PRIVATE
PRIVATE
BYPASS
Notes
1
1
1
3
4
3
3
3
1. Places DQs in High-Z in order to sample all input data regardless of the other SRAM inputs.
2. TDI is sampled as an input to the first ID register to allow for the serial shift of the external TDI data.
3. BYPASS register is initiated to Vss when BYPASS instruction is invoked. The BYPASS register also holds the last
serially loaded TDI when exiting the Shift DR state.
4. SAMPLE instruction does not place DQs in High-Z
List of IEEE 1149.1 standard violations :
7.2.1.b,e
7.7.1.a-f
10.1.1.b,e
10.7.1.a-d
6.1.1.d
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A65H83181P-5 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-6 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181P-7 | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A65H83181SERIES | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output |
| A-65J | 制造商:Triad Magnetics 功能描述: |
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