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| 型號： | A3PE1500-PQG208I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 38400 CLBS, 1500000 GATES, PQFP208 |
| 封裝： | 28 X 28 MM, 3.40 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, QFP-208 |
| 文件頁數(shù)： | 2/152頁 |
| 文件大?。?/td> | 4932K |
| 代理商： | A3PE1500-PQG208I |
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ProASIC3E Device Family Overview
1- 6
v1.1
Pro I/Os with Advanced I/O Standards
The ProASIC3E family of FPGAs features a flexible I/O structure, supporting a range of voltages
(1.5 V, 1.8 V, 2.5 V, and 3.3 V). ProASIC3E FPGAs support 19 different I/O standards, including single-
ended, differential, and voltage-referenced. The I/Os are organized into banks, with eight banks
per device (two per side). The configuration of these banks determines the I/O standards
supported. Each I/O bank is subdivided into VREF minibanks, which are used by voltage-referenced
I/Os. VREF minibanks contain 8 to 18 I/Os. All the I/Os in a given minibank share a common VREF line.
Therefore, if any I/O in a given VREF minibank is configured as a VREF pin, the remaining I/Os in that
minibank will be able to use that reference voltage.
Each I/O module contains several input, output, and enable registers. These registers allow the
implementation of the following:
Single-Data-Rate applications (e.g., PCI 66 MHz, bidirectional SSTL 2 and 3, Class I and II)
Double-Data-Rate applications (e.g., DDR LVDS, B-LVDS, and M-LVDS I/Os for point-to-point
communications, and DDR 200 MHz SRAM using bidirectional HSTL Class II)
ProASIC3E banks support M-LVDS with 20 multi-drop points.
Part Number and Revision Date
Part Number 51700098-001-2
Revised February 2009
List of Changes
The following table lists critical changes that were made in the current version of the document.
Previous Version
Changes in Current Version (v1.1)
Page
v1.0
(March 2008)
51700098-001-1
This document was divided into two sections and given a version number,
starting at v1.0. The first section of the document includes features, benefits,
ordering information, and temperature and speed grade offerings. The second
section is a device family overview.
N/A
51700098-001-0
(January 2008)
The FG324 package was added to the "ProASIC3E Product Family" table, the
"I/Os Per Package1" table, and the "Temperature Grade Offerings" table for
A3PE3000.
v2.1
(July 2007)
This document was previously in datasheet v2.1. As a result of moving to the
handbook format, Actel has restarted the version numbers. The new version
number is 51700098-001-0.
N/A
v2.0
(April 2007)
CoreMP7 information was removed from the "Features and Benefits" section.
i
The M1 device part numbers have been updated in Table 4 ProASIC3E
Product Family, "Packaging Tables", "Temperature Grade Offerings", "Speed
Grade and Temperature Grade Matrix", and "Speed Grade and Temperature
Grade Matrix".
ii, iii,
iv, iv
The words "ambient temperature" were added to the temperature range in
the "Temperature Grade Offerings", "Speed Grade and Temperature Grade
Matrix", and "Speed Grade and Temperature Grade Matrix" sections.
iii, iv, iv
The "Clock Conditioning Circuit (CCC) and PLL" section was updated.
i
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A3PE1500-PQG208 | FPGA, 38400 CLBS, 1500000 GATES, PQFP208 |
| A3PN060-FVQ100 | FPGA, 1536 CLBS, 60000 GATES, PQFP100 |
| A3PN060-FVQG100 | FPGA, 1536 CLBS, 60000 GATES, PQFP100 |
| A3PN060-ZFVQ100 | FPGA, 1536 CLBS, 60000 GATES, PQFP100 |
| A3PN060-ZFVQG100 | FPGA, 1536 CLBS, 60000 GATES, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A3PE1500-PQG896 | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs |
| A3PE1500-PQG896ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs |
| A3PE1500-PQG896I | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs |
| A3PE1500-PQG896PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs |
| A3PE3000-1FG324 | 功能描述:IC FPGA 1KB FLASH 3M 324-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ProASIC3E 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計:6635520 輸入/輸出數(shù):270 門數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
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