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參數(shù)資料
| 型號： | A3251LUA-T |
| 廠商： | Allegro Microsystems Inc |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 300K |
| 描述： | IC SW HALL EFFECT UNI 3-SIP |
| 標準包裝： | 500 |
| 傳感范圍： | 50G |
| 類型： | 單極開關 |
| 電源電壓： | 4.2 V ~ 24 V |
| 電流 - 電源： | 10mA |
| 電流 - 輸出（最大）： | 20mA |
| 輸出類型： | 數(shù)字，開路集電極 |
| 特點： | 穩(wěn)壓電壓 |
| 工作溫度： | -40°C ~ 150°C |
| 封裝/外殼： | 3-SIP |
| 供應商設備封裝： | 3-SIP |
| 包裝： | 散裝 |
Field-Programmable, Chopper-Stabilized,
Unipolar Hall-Effect Switches
A3250 and
A3251
12
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Application Information
For additional general application information, visit the Allegro
MicroSystems Web site at www. allegromicro.com.
Typical application circuit
Typical Application Circuit
It is strongly recommended that an external ceramic bypass
capacitor, C
BYP
, in the range of 0.01 糉 to 0.1 糉 be connected
between the VCC pin and the supply and GND pin to reduce
both external noise and noise generated by the chopper-stabiliza-
tion technique. (The diagram at the right shows C
BYP
at 0.1 糉.)
C
BYP
should be installed so that the traces that connect it to the
A3250/A3251 are no greater than 5 mm in length. (For program-
ming the device, the capacitor may be further away from the
device, including mounting on the board used for programming
the device.)
The series resistor R
S
, in combination with C
BYP
creates a filter
for EMI pulses. (Additional information on EMC is provided
on the Allegro MicroSystems Web site.) R
S
will have a drop
of approximately 800 mV. This must be taken into consider-
ation when determining the minimum VCC requirement for the
A3250/A3251. The pull-up resistor, R
L
, should be chosen to
limit the current through the output transistor; do not exceed the
maximum continuous output current of the device.
GND
A3250/A3251
VCC
V
Supply
0.1 糉
A
R
L
C
BYP
R
S
100 ?/DIV>
1.2 k?/DIV>
5V
VOUT
A
A
Maximum separation 5 mm
from C
BYP
to device
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