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參數(shù)資料
| 型號(hào)： | A1400AMT3C |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1400 MHz, MICROPROCESSOR, CPGA453 |
| 封裝： | STAGGERED, CERAMIC, PGA-453 |
| 文件頁(yè)數(shù)： | 74/90頁(yè) |
| 文件大小： | 1497K |
| 代理商： | A1400AMT3C |
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62
Pin Descriptions
Chapter 10
AMD Athlon Processor Model 4 Data Sheet
23792I—June 2001
Preliminary Information
10.3
Detailed Pin Descriptions
The information in this section pertains to Table 17 on page 54.
A20M# Pin
A20M# is an input from the system used to simulate address
wrap-around in the 20-bit 8086.
AMD Pin
AMD Socket A processors do not implement a pin at location
AH6. All Socket A designs must have a top plate or cover that
blocks this pin location. When the cover plate blocks this
location, a non-AMD part (e.g., PGA370) does not fit into the
socket. However, socket manufacturers are allowed to have a
contact loaded in the AH6 position. Therefore, motherboard
socket design should account for the possibility that a contact
could be loaded in this position.
AMD Athlon System
Bus Pins
See the AM D A t h l o n and AM D D uro n System B u s
Specification, order# 21902 for information about the system
bus pins — PROCRDY, PWROK, RESET#, SADDIN[14:2]#,
SA DDIN CL K#, SAD DOUT[ 14:2] #, S ADD OUTC LK#,
SCHECK[7:0]#, SDATA[63:0]# , SDATAINCLK[3:0 ]#,
SDATAINVALID#, SDATAOUTCLK[3:0]#, SDATAOUTVALID#,
SFILLVALID#.
Analog Pin
Treat this pin as a NC.
APIC Pins, PICCLK,
PICD[1:0]#
The Advanced Programmable Interrupt Controller (APIC) is a
feature that provides a flexible and expandable means of
delivering interrupts in a system using an AMD processor. The
pins, PICD[1:0], are the bi-directional message-passing signals
used for the APIC and are driven to the Southbridge or a
dedicated I/O APIC. The pin, PICCLK, must be driven with a
valid clock input. For more information, see Table 14, “APIC
CLKFWDRST Pin
CLKFWDRST resets clock-forward circuitry for both the system
and processor.
CLKIN, RSTCLK
(SYSCLK) Pins
Connect CLKIN (AN17) with RSTCLK (AN19) and name it
SYSCLK. Connect CLKIN# (AL17) with RSTCLK# (AL19) and
name it SYSCLK#. Length match the clocks from the clock
generator to the Northbridge and processor. See “SYSCLK and
SYSCLK# Pins” on page 66 for more information.
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