Note: 1. D repres" />
鍙冩暩璩囨枡
鍨嬭櫉锛� A1010B-1VQ80C
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩锛� 11/98闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1200 GATES 80-VQFP COM
妯欐簴鍖呰锛� 90
绯诲垪锛� ACT™ 1
LAB/CLB鏁革細 295
杓稿叆/杓稿嚭鏁革細 57
闁€鏁革細 1200
闆绘簮闆诲锛� 4.5 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 80-TQFP
渚涙噳鍟嗚ō鍌欏皝瑁濓細 80-VQFP锛�14x14锛�
19
Hi R e l F P GA s
S equ en ti a l Ti m i ng Cha r a c t e ri s t i c s
Fl i p - F l ops and La tc h e s (AC T 3)
Note:
1.
D represents all data functions involving A, B, and S for multiplexed flip-flops.
(Positive edge triggered)
D
E
CLK
CLR
Y
D1
G, CLK
E
Q
CLR
tWCLKA
tWASYN
tHD
tSUENA
tSUD
tCLR
tA
tCO
tHENA
鐩搁棞PDF璩囨枡
PDF鎻忚堪
A1010B-1VQG80C IC FPGA 1200 GATES 80-VQFP COM
5745175-1 CONN BACKSHELL DB50 DIE CAST
5745172-1 CONN BACKSHELL DB15 DIE CAST
A1010B-2PQG100C IC FPGA 1200 GATES 100-PQFP COM
5748677-4 CONN BACKSHELL DB37 METAL PLATED
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鍙冩暩鎻忚堪
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