參數(shù)資料
型號: 9S12E128DGV1
廠商: Motorola, Inc.
英文描述: MC9S12E-Family Device User Guide V01.04
中文描述: MC9S12E -系列設(shè)備的用戶手冊V01.04
文件頁數(shù): 91/156頁
文件大?。?/td> 3077K
代理商: 9S12E128DGV1
91
Section 3 System Clock Description
The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules.
Figure 3-1
shows the clock connections from the CRG to all modules. Consult the CRG Block Guide for
details on clock generation.
Figure 3-1 Clock Connections
Table 3-1Clock Selection Based on PE7
PE7 = XCLKS
1
0
Description
Colpitts Oscillator selected
Pierce Oscillator/external clock selected
CRG
Bus Clock
Core Clock
EXTAL
XTAL
Oscillator Clock
HCS12 CORE
PWM
RAM
PIM
IIC
DAC
Flash
ATD
SCI0, SCI1, SCI2
PMF
SPI
BDM
OSC
CPU
MEBI
MMC
INT
DBG
TIM0, TIM1, TIM2
VREG
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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