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參數(shù)資料
| 型號： | 9LPRS535BFLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO48 |
| 封裝： | 0.300 INCH, MO-118, SSOP-48 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 216K |
| 代理商： | 9LPRS535BFLF |
12
Integrated
Circuit
Systems, Inc.
ICS9LPRS535
Datasheet
1461A—07/28/09
Byte 4 Output Enable and Spread Spectrum Disable Register
Bit
Pin
Name
Description
Type
0
1
Default
7
SRC3_OE
Output enable for SRC3
RW
Output Disabled
Output Enabled
1
6
SATA/SRC2_OE
Output enable for SATA/SRC2
RW
Output Disabled
Output Enabled
1
5
Reserved
RW
0
4
SRC0/DOT96_OE
Output enable for SRC0/DOT96
RW
Output Disabled
Output Enabled
1
3
CPU1_OE
Output enable for CPU1
RW
Output Disabled
Output Enabled
1
2
CPU0_OE
Output enable for CPU0
RW
Output Disabled
Output Enabled
1
PLL1_SSC_ON
Enable PLL1's spread modulation
RW
Spread Disabled
Spread Enabled
1
0
Reserved
RW
0
Byte 5 Clock Request Enable/Configuration Register
Bit
Pin
Name
Description
Type
0
1
Default
7
CR#_A_EN
Enable CR#_A (clk req),
PCI0_OE must be = 1 for this bit to take effect
RW
Disable CR#_A
Enable CR#_A
0
6
CR#_A_SEL
Sets CR#_A to control either SRC0 or SRC2
RW
CR#_A -> SRC0
CR#_A -> SRC2
0
5
Reserved
RW
0
4
Reserved
RW
0
3
CR#_C_EN
Enable CR#_C (clk req)
RW
Disable CR#_C
Enable CR#_C
0
2
CR#_C_SEL
Sets CR#_C -> SRC0 or SRC2
RW
CR#_C -> SRC0
CR#_C -> SRC2
0
1
CR#_D_EN
Enable CR#_D (clk req)
RW
Disable CR#_D
Enable CR#_D
0
CR#_D_SEL
Sets CR#_D -> SRC1 or SRC4
RW
NA, SRC1 not
present
CR#_D -> SRC4
0
Byte 6 Clock Request Enable/Configuration and Stop Control Register
Bit
Pin
Name
Description
Type
0
1
Default
7
Reserved
RW
0
6
CR#_F_EN
Enable CR#_F (clk req) -> SRC8
RW
Disable CR#_F
Enable CR#_F
0
5
Reserved
RW
0
4
Reserved
RW
0
3
Reserved
RW
0
2
Reserved
RW
0
1
Reserved
RW
0
SRC_STP_CRTL
If set, SRCs (except SRC1) stop with PCI_STOP#
RW
Free Running
Stops with
PCI_STOP#
assertion
0
Byte 7 Vendor ID/ Revision ID
Bit
Pin
Name
Description
Type
0
1
Default
7
Rev Code Bit 3
R
X
6
Rev Code Bit 2
R
X
5
Rev Code Bit 1
R
X
4
Rev Code Bit 0
R
X
3
Vendor ID bit 3
R
0
2
Vendor ID bit 2
R
0
1
Vendor ID bit 1
R
0
Vendor ID bit 0
R
1
ICS is 0001
B rev = 0001
C rev = 0010
Vendor ID
ICS is 0001, binary
Revision ID
Rev B = 0001
Rev C = 0010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9LPRS535BFLFT | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS535BGLF | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS535BGLFT | 制造商:Integrated Device Technology Inc 功能描述:48-PIN CK505 FOR INTEL SYSTEMS 制造商:Integrated Device Technology Inc 功能描述:48 TSSOP (LEAD FREE) - Tape and Reel |
| 9LPRS535CFLF | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:48-pin CK505 for Intel Systems |
| 9LPRS535CFLFT | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:48-pin CK505 for Intel Systems |
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