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參數(shù)資料
| 型號： | 9601-11 |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | 2200 MHz UltraCMOS⑩ Integer-N PLL for Rad Hard Applications |
| 中文描述： | PHASE LOCKED LOOP, CQCC44 |
| 封裝： | CERAMIC, QFJ-44 |
| 文件頁數(shù)： | 10/14頁 |
| 文件大?。?/td> | 257K |
| 代理商： | 9601-11 |
Product Specification
PE9601
Page 5 of 14
Document No. 70-0025-05
│ www.psemi.com
2005 Peregrine Semiconductor Corp. All rights reserved.
Table 2. Absolute Maximum Ratings
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
-0.3
4.0
V
VI
Voltage on any input
-0.3
VDD +
0.3
V
II
DC into any input
-10
+10
mA
IO
DC into any output
-10
+10
mA
Tstg
Storage temperature range
-65
150
°C
Table 3. Operating Ratings
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
2.85
3.15
V
TA
Operating ambient
temperature range
-40
85
°C
Symbol
Parameter/Conditions
Level
Units
VESD
ESD voltage (Human Body
Model) – Note 1
1000
V
Table 4. ESD Ratings
Note 1:
Periodically sampled, not 100% tested. Tested per MIL-
STD-883, M3015 C2
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