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參數(shù)資料
| 型號： | 95V842AFILF-T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, LEAD FREE, MO-137, SSOP-16 |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 75K |
| 代理商： | 95V842AFILF-T |
4
ICS95V842
0830B—11/24/08
Timing Requirements
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Max clock frequency
3
freqop
33
233
MHz
Application Frequency
Range
3
freqApp
60
220
MHz
Input clock duty cycle
dtin
40
60
%
CLK stabilization
TSTAB
100
s
DC Electrical Characteristics
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDDQ, AVDD
2.3
2.5
2.7
V
Low level input voltage
VIL
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.4
VDD/2 - 0.18
V
High level input voltage
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
VDD/2 + 0.18
2.1
V
DC input signal voltage
(note 1,2)
VIN
-0.3
VDD + 0.3
V
Differential input signal
voltage (note 3)
VID
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.36
VDD + 0.6
V
Differential output voltage
(note 3)
VOD
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2
VDD/2 + 0.2
V
Operating free-air
temperature
TA
085
°C
Notes:
1
2
3
4
Differential input signal voltage specifies the differential voltage [VTR-VCP] required for switching,
where VTR is the true input level and VCP is the complementary input level.
Differential cross-point voltage is expected to track variations of VDD and is the voltage at which
the differential signal must be crossing.
Unused inputs must be held high or low to prevent them from floating.
DC input signal voltage specifies the allowable DC excursion of differential input.
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| 95V842YFLF-T | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842YFILF | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 95V842AFLF | 95V SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 95V842AFLF | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V842AFLFT | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V847AG | 功能描述:時鐘驅(qū)動器及分配 1:5, 2.5V Phase-Lock Loop Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 95V847AGI | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP Tube 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver |
| 95V847AGIT | 制造商:Integrated Device Technology Inc 功能描述:Zero Delay PLL Clock Driver Single 45MHz to 233MHz 24-Pin TSSOP T/R 制造商:Integrated Device Technology Inc 功能描述:1:5, 2.5V Phase-Lock Loop Clock Driver |
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