參數(shù)資料
型號： 952601YFLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時鐘產(chǎn)生/分配
英文描述： PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 0.300 INCH, 0.25 INCH PITCH, ROHS COMPLIANT, MO-118, SSOP-56
文件頁數(shù)： 5/25頁
文件大?。?/td> 227K
代理商： 952601YFLFT
IDTTM
Progammable Timing Control HubTM for Next Gen P4TM Processor
701J—01/25/10
ICS952601
Programmable Timing Control HubTM for Next Gen P4TM Processor
13
I
2C Table: Output Control and Fix Frequency Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
Test Clock Mode
-
Disable
Enable
0
Bit 6
RESERVED
-
0
Bit 5
RESERVED
FS_A and FS_B
Operation
-
Normal
Test Mode
0
Bit 4
RESERVED
SRC Frequency
Select
-
100MHz
200MHz
0
Bit 3
RESERVED
-
0
Bit 2
Spread Spectrum Mode
Spread OFF
Spread
ON
0
Bit 1
REF1
Output Control
RW
Disable
Enable
1
Bit 0
REF0
Output Control
RW
Disable
Enable
1
I
2C Table: Vendor & Revision ID Register
Pin #
Name
Control Function
Type
0
1
PWD
Bit 7
RID3
R
-
X
Bit 6
RID2
R
-
X
Bit 5
RID1
R
-
X
Bit 4
RID0
R
-
X
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
1,2,7,8,9,12,13,14,1
5,18,19,20,22,23,26,
27,29,31,32,37,38,4
0,41,43,44,46,47
-
40,41,43,44,46,47
Byte 6
2
1
37,38
7,8,9,12,13,14,15,18
,19,20,22,23,26,27,2
9,31,32,37,38,40,41,
43,44,46,47
Byte 7
-
REVISION ID
-
VENDOR ID
-
相關(guān)PDF資料
PDF描述
952703BF 217.9 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
952801CFLFT 293.34 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
952807 MODULAR TERMINAL BLOCK
9528090000 10 A, MODULAR TERMINAL BLOCK, 1 DECK
952830 MODULAR TERMINAL BLOCK
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