參數(shù)資料
型號(hào)： 951413CFLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘產(chǎn)生/分配
英文描述： 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56
文件頁(yè)數(shù)： 20/26頁(yè)
文件大?。?/td> 257K
代理商： 951413CFLFT
3
Integrated
Circuit
Systems, Inc.
ICS951413
0929D—10/30/06
Pin Description (Continued)
PIN #
PIN NAME
PIN
TYPE
Pin Description
29
ATIGCLKC0
OUT Complementary clock of differential ATIGCLK clock pair.
30
ATIGCLKT0
OUT True clock of differential ATIGCLK clock pair.
31
GNDATI
PWR Ground for ATI Gclocks, nominal 3.3V
32
VDDATI
PWR Power supply ATI Gclocks, nominal 3.3V
33
SRCCLKC0
OUT Complement clock of differential SRC clock pair.
34
SRCCLKT0
OUT True clock of differential SRC clock pair.
35
VDDSRC
PWR Supply for SRC clocks, 3.3V nominal
36
GNDSRC
PWR Ground pin for the SRC outputs
37
IREF
OUT
This pin establishes the reference current for the differential current-mode
output pairs. This pin requires a fixed precision resistor tied to ground in order
to establish the appropriate current. 475 ohms is the standard value.
38
GNDA
PWR Ground pin for the PLL core.
39
VDDA
PWR 3.3V power for the PLL core.
40
CPUCLKC2_ITP
OUT
Complementary clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
41
CPUCLKT2_ITP
OUT
True clock of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
42
CPUCLKC1
OUT
Complementary clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
43
CPUCLKT1
OUT
True clock of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
44
GNDCPU
PWR Ground pin for the CPU outputs
45
VDDCPU
PWR Supply for CPU clocks, 3.3V nominal
46
CPUCLKC0
OUT
Complementary clock of differential pair CPU outputs. These are current mode
outputs. External resistors are required for voltage bias.
47
CPUCLKT0
OUT
True clock of differential pair CPU outputs. These are current mode outputs.
External resistors are required for voltage bias.
48
*CPU_STOP#
IN
Stops all CPUCLK, except those set to be free running clocks
49
GNDPCI
PWR Ground pin for the PCI outputs
50
**CK410#/PCICLK0
I/O
FS Table select latch input pin / 3.3V PCI clock output.
0 = CK410 FS Table, 1 = CK409 FS Table
51
VDDPCI
PWR Power supply for PCI clocks, nominal 3.3V
52
**TEST_SEL/REF2
I/O
TEST_SEL: latched input to select TEST MODE / 14.318 MHz reference clock.
1 = All outputs are CK410 REF/N test mode
0 = All outputs behave normally.
53
**FS_B/REF1
I/O
Frequency select latch input pin / 14.318 MHz reference clock.
54
**FS_A/REF0
I/O
Frequency select latch input pin / 14.318 MHz reference clock.
55
GND
PWR Ground pin.
56
VDDREF
PWR Ref, XTAL power supply, nominal 3.3V
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951414-2011309-AR-PT 功能描述:集管和線殼 14P BD STCK HDR 2R STRT SMT 10U AU RoHS:否 產(chǎn)品種類:1.0MM Rectangular Connectors 產(chǎn)品類型:Headers - Pin Strip 系列:DF50 觸點(diǎn)類型:Pin (Male) 節(jié)距:1 mm 位置/觸點(diǎn)數(shù)量:16 排數(shù):1 安裝風(fēng)格:SMD/SMT 安裝角:Right 端接類型:Solder 外殼材料:Liquid Crystal Polymer (LCP) 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Gold 制造商:Hirose Connector
951414-2011309-AR-TP 功能描述:集管和線殼 14P BD STCK HDR 2R STRT SMT 10U AU RoHS:否 產(chǎn)品種類:1.0MM Rectangular Connectors 產(chǎn)品類型:Headers - Pin Strip 系列:DF50 觸點(diǎn)類型:Pin (Male) 節(jié)距:1 mm 位置/觸點(diǎn)數(shù)量:16 排數(shù):1 安裝風(fēng)格:SMD/SMT 安裝角:Right 端接類型:Solder 外殼材料:Liquid Crystal Polymer (LCP) 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Gold 制造商:Hirose Connector
951414-2011409-AR-PT 功能描述:集管和線殼 14P BD STCK HDR 2R STRT SMT 10U AU RoHS:否 產(chǎn)品種類:1.0MM Rectangular Connectors 產(chǎn)品類型:Headers - Pin Strip 系列:DF50 觸點(diǎn)類型:Pin (Male) 節(jié)距:1 mm 位置/觸點(diǎn)數(shù)量:16 排數(shù):1 安裝風(fēng)格:SMD/SMT 安裝角:Right 端接類型:Solder 外殼材料:Liquid Crystal Polymer (LCP) 觸點(diǎn)材料:Brass 觸點(diǎn)電鍍:Gold 制造商:Hirose Connector
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