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參數(shù)資料
| 型號： | 935271407115 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | Buffer和線驅(qū)動 |
| 英文描述： | LINE TRANSCEIVER, PBCC16 |
| 封裝： | 3 X 3 X 0.65 MM, PLASTIC, MO-217, SOT-639-2, HBCC-16 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大小： | 518K |
| 代理商： | 935271407115 |
Philips Semiconductors
ISP1104
Advanced USB transceiver
Product data
Rev. 01 — 26 August 2002
12 of 21
9397 750 09784
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
[1]
Characterized only, not tested. Limits guaranteed by design.
tPLZ
driver disable delay
(OE to D
+, D)
LOW-to-OFF; see Figure 5
--15
ns
tPZH
driver enable delay
(OE to D
+, D)
OFF-to-HIGH; see Figure 5
--15
ns
tPZL
driver enable delay
(OE to D
+,D)
OFF-to-LOW; see Figure 5
--15
ns
Receiver timings
Differential receiver
tPLH(rcv)
propagation delay
(D
+,D to RCV)
LOW-to-HIGH; see Figure 6
--15
ns
tPHL(rcv)
propagation delay
(D
+,D to RCV)
HIGH-to-LOW; see Figure 6
--15
ns
Single-ended receiver
tPLH(se)
propagation delay
(D
+,D to VP, VM)
LOW-to-HIGH; see Figure 6
--18
ns
tPHL(se)
propagation delay
(D
+,D to VP, VM)
HIGH-to-LOW; see Figure 6
--18
ns
Table 14:
Dynamic characteristics: analog I/O pins (D
+, D)…continued
VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND =0V; Tamb = 40 to +85 °C; see Figure 10; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Fig 4.
Rise and fall times.
Fig 5.
Timing of OE to D
+, D.
Fig 6.
Timing of D
+, D to RCV, VP, VM.
Fig 7.
Timing of VPO/VO, VMO/FSE0 to D
+, D.
MGS963
VOL
tFR, tLR
tFF, tLF
VOH
90%
10%
90%
MGS966
VOL
VOH
tPZH
tPZL
tPHZ
tPLZ
VOH 0.3 V
VOL +0.3 V
VCRS
0.9 V
1.65 V
0 V
logic input
differential
data lines
MGS965
VOL
VOH
tPHL(rcv)
tPHL(se)
tPLH(rcv)
tPLH(se)
VCRS
0.9 V
2.0 V
0.8 V
logic output
differential
data lines
MGS964
VOL
VOH
tPHL(drv)
tPLH(drv)
VCRS
0.9 V
1.65 V
0 V
logic input
differential
data lines
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