參數(shù)資料
型號(hào): 935271407115
廠商: NXP SEMICONDUCTORS
元件分類(lèi): Buffer和線驅(qū)動(dòng)
英文描述: LINE TRANSCEIVER, PBCC16
封裝: 3 X 3 X 0.65 MM, PLASTIC, MO-217, SOT-639-2, HBCC-16
文件頁(yè)數(shù): 3/21頁(yè)
文件大?。?/td> 518K
代理商: 935271407115
Philips Semiconductors
ISP1104
Advanced USB transceiver
Product data
Rev. 01 — 26 August 2002
11 of 21
9397 750 09784
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
[1]
VOH(min) =Vreg(3.3) 0.2 V.
[2]
Includes external resistors of 33
±1% on both pins D+ and D.
[3]
Includes external resistors of 39
±1% on both pin D+ and D. This range complies with Universal Serial Bus Specication Rev. 2.0.
[4]
This voltage is available at pins Vreg(3.3) and Vpu(3.3).
[5]
The minimum voltage is 2.7 V in the ‘suspend’ mode.
12. Dynamic characteristics
Capacitance
CIN
transceiver capacitance
pin to GND
-
20
pF
Resistance
ZDRV
driver output impedance
steady-state drive
39
44
ZDRV2
driver output impedance for
USB 2.0
steady-state drive
[3] 40.5
45
49.5
ZINP
input impedance
10
-
M
RSW
internal switch resistance at
pin Vpu(3.3)
--10
Termination
VTERM[4]
termination voltage for
upstream port pull-up (Rpu)
3.0[5]
-
3.6
V
Table 13:
Static characteristics: analog I/O pins (D
+, D)…continued
VCC(5.0) = 4.0 to 5.5 V; VGND =0V; Tamb = 40 to +85 °C; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 14:
Dynamic characteristics: analog I/O pins (D
+, D)
VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND =0V; Tamb = 40 to +85 °C; see Figure 10; unless otherwise specied.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Driver characteristics
tFR
rise time
CL = 50 to 125 pF;
10% to 90% of
|VOH VOL|;
4
-
20
ns
tFF
fall time
CL = 50 to 125 pF;
90% to 10% of
|VOH VOL|;
4
-
20
ns
FRFM
differential rise/fall time
matching (tFR/tFF)
excluding the rst transition
from the Idle state
90
-
111.1
%
VCRS
output signal crossover
voltage
excluding the rst transition
from Idle state; see Figure 7
[1] 1.3
-
2.0
V
Driver timing
tPLH(drv)
driver propagation delay
(VPO/VO, VMO/FSE0 to
D
+,D)
LOW-to-HIGH; see Figure 7
--18
ns
tPHL(drv)
driver propagation delay
(VPO/VO, VMO/FSE0 to
D
+,D)
HIGH-to-LOW; see Figure 7
--18
ns
tPHZ
driver disable delay (OE to
D
+, D)
HIGH-to-OFF; see Figure 5
--15
ns
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