參數(shù)資料
型號: 935270056529
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68
封裝: PLASTIC, MS-018, SOT-188-2, LCC-68
文件頁數(shù): 7/52頁
文件大?。?/td> 680K
代理商: 935270056529
Philips Semiconductors
SC16C754
Quad UART with 64-byte FIFO
Product data
Rev. 02 — 14 March 2003
15 of 49
9397 750 11192
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
6.5.1
Interrupt mode operation
In interrupt mode (if any bit of IER[3:0] is 1) the processor is informed of the status of
the receiver and transmitter by an interrupt signal, INT. Therefore, it is not necessary
to continuously poll the line status register (LSR) to see if any interrupt needs to be
serviced. Figure 8 shows interrupt mode operation.
6.5.2
Polled mode operation
In polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the line status register (LSR). This mode is an alternative to the
FIFO interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU. Figure 9 shows FIFO
polled mode operation.
Fig 8.
Interrupt mode operation.
11
IIR
IER
THR
RHR
PROCESSOR
IOW / IOR
INT
002aaa230
Fig 9.
FIFO polled mode operation.
00
LSR
IER
THR
RHR
PROCESSOR
IOW / IOR
002aaa231
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