- 您現(xiàn)在的位置：買賣IC網 > PDF目錄24832 > 935270053518 (NXP SEMICONDUCTORS) 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號： | 935270053518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, MS-018, SOT-187-2, LCC-44 |
| 文件頁數(shù)： | 46/48頁 |
| 文件大?。?/td> | 657K |
| 代理商： | 935270053518 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當前第46頁第47頁第48頁
Philips Semiconductors
SC16C750
Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO
Product data
Rev. 03 — 14 March 2003
7 of 45
9397 750 11203
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
OUT1, OUT2 38, 35
30, 25
O
Outputs 1 and 2. These are user-designated output terminals that are set
to the active (low) level by setting respective modem control register (MCR)
bits (OUT1 and OUT2). OUT1 and OUT2 are set to inactive the (HIGH) level
as a result of Master Reset, during loop mode operations, or by clearing
bit 2 (OUT1) or bit 3 (OUT2) of the MCR.
RCLK
10
54
I
Receiver clock. RCLK is the 16
× baud rate clock for the receiver section of
the UART.
IOR, IOR
24, 25
9, 10
I
Read inputs. When either IOR or IOR is active (LOW or HIGH,
respectively) while the UART is selected, the CPU is allowed to read status
information or data from a selected UART register. Only one of these inputs
is required for the transfer of data during a read operation; the other input
should be tied to its inactive level (i.e., IOR tied LOW or IOR tied HIGH).
RI
43
38
I
Ring indicator. RI is a modem status signal. Its condition can be checked
by reading bit 6 (RI) of the modem status register. Bit 2 (
RI) of the modem
status register indicates that RI has transitioned from a LOW to a HIGH
level since the last read from the modem status register. If the modem
status interrupt is enabled when this transition occurs, an interrupt is
generated.
RTS
36
26
O
Request to send. When active, RTS informs the modem or data set that
the UART is ready to receive data. RTS is set to the active level by setting
the RTS modem control register bit and is set to the inactive (HIGH) level
either as a result of a Master Reset or during loop mode operations or by
clearing bit 1 (RTS) of the MCR. In the auto-RTS mode, RTS is set to the
inactive level by the receiver threshold control logic.
RXRDY32
21
O
Receiver ready. Receiver direct memory access (DMA) signaling is
available with RXRDY. When operating in the FIFO mode, one of two types
of DMA signaling can be selected using the FIFO control register bit 3
(FCR[3]). When operating in the 16C450 mode, only DMA mode 0 is
allowed. Mode 0 supports single-transfer DMA in which a transfer is made
between CPU bus cycles. Mode 1 supports multi-transfer DMA in which
multiple transfers are made continuously until the receiver FIFO has been
emptied. In DMA mode 0 (FCR0 = 0 or FCR0 = 1, FCR3 = 0), when there is
at least one character in the receiver FIFO or receiver holding register,
RXRDY is active (LOW). When RXRDY has been active but there are no
characters in the FIFO or holding register, RXRDY goes inactive (HIGH). In
DMA mode 1 (FCR0 = 1, FCR3 = 1), when the trigger level or the time-out
has been reached, RXRDY goes active (LOW); when it has been active but
there are no more characters in the FIFO or holding register, it goes inactive
(HIGH).
RX
11
55
I
Serial data input. RX is serial data input from a connected communications
device.
TX
13
58
I
Serial data output. TX is composite serial data output to a connected
communication device. TX is set to the marking (HIGH) level as a result of
Master Reset.
Table 2:
Pin description…continued
Symbol
Pin
Type
Description
PLCC44 LQFP64
相關PDF資料 |
PDF描述 |
|---|---|
| 935270054157 | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQFP64 |
| 08051C103JA74A | General Specifications |
| 935270056529 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68 |
| 935270056518 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC68 |
| 935270057557 | 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP80 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 935270713557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP |
| 935270792551 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270792557 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270793551 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
| 935270793557 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
發(fā)布緊急采購，3分鐘左右您將得到回復。