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參數(shù)資料
| 型號(hào)： | 935270053512 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封裝： | PLASTIC, MS-018, SOT-187-2, LCC-44 |
| 文件頁數(shù)： | 47/48頁 |
| 文件大?。?/td> | 657K |
| 代理商： | 935270053512 |
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Philips Semiconductors
SC16C750
Universal Asynchronous Receiver/Transmitter (UART) with 64-byte FIFO
Product data
Rev. 03 — 14 March 2003
8 of 45
9397 750 11203
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
In sleep mode, XTAL2 is left oating.
TXRDY27
13
O
Transmitter ready. Transmitter DMA signaling is available with TXRDY.
When operating in the FIFO mode, one of two types of DMA signaling can
be selected using FCR[3]. When operating in the 16C450 mode, only DMA
mode 0 is allowed. Mode 0 supports single-transfer DMA in which a transfer
is made between CPU bus cycles. Mode 1 supports multi-transfer DMA in
which multiple transfers are made continuously until the transmit FIFO has
been lled.
VCC
44
40
Power 2.5 V, 3 V or 5 V supply voltage.
VSS
22
8
Power Ground voltage.
IOW, IOW
20, 21
4, 6
I
Write inputs. When either IOW or IOW is active (LOW or HIGH,
respectively) and while the UART is selected, the CPU is allowed to write
control words or data into a selected UART register. Only one of these
inputs is required to transfer data during a write operation; the other input
should be tied to its inactive level (i.e., IOW tied LOW or IOW tied HIGH).
XTAL1
18
1
I
Crystal connection or External clock input.
XTAL2[1]
19
2
O
Crystal connection or the inversion of XTAL1 if XTAL1 is driven.
Table 2:
Pin description…continued
Symbol
Pin
Type
Description
PLCC44 LQFP64
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