參數(shù)資料
型號: 935268832557
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-022, SOT322-2 , QFP-160
文件頁數(shù): 108/178頁
文件大小: 988K
代理商: 935268832557
2004 Jul 22
35
Philips Semiconductors
Product specication
Multistandard video decoder with adaptive
comb lter and component video input
SAA7118
Fig.20 CVBS (raw data) range for scaler input, data slicer and X port output.
CVBS levels with default settings RAWG[7:0] = 64 and RAWO[7:0] = 128.
Equation for modification of the raw data levels via bytes RAWG and RAWO:
It should be noted that the resulting levels are limited to 1 to 254 in accordance with “ITU Recommendation 601/656”.
CVBS
OUT
Int
RAWG
64
------------------
CVBS
nom
128
()
×
RAWO
+
=
LUMINANCE
+255
+209
+71
+60
1
white
sync bottom
black shoulder
black
SYNC
LUMINANCE
+255
+199
+60
1
white
sync bottom
black shoulder = black
SYNC
MGD700
a. Sources containing 7.5 IRE black level offset
(e.g. NTSC M).
b. Sources not containing black level offset.
8.1.3
SYNCHRONIZATION
The prefiltered luminance signal is fed to the synchronization stage. Its bandwidth is further reduced to 1 MHz in a
low-pass filter. The sync pulses are sliced and fed to the phase detectors where they are compared with the sub-divided
clock frequency. The resulting output signal is applied to the loop filter to accumulate all phase deviations. Internal signals
(e.g. HCL and HSY) are generated in accordance with analog front-end requirements. The loop filter signal drives an
oscillator to generate the line frequency control signal LFCO; see Fig.21.
The detection of ‘pseudo syncs’ as part of the Macrovision copy protection standard is also achieved within the
synchronization circuit.
The result is reported as flag COPRO within the decoder status byte at subaddress 1FH.
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