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參數(shù)資料
| 型號(hào)： | 935266783518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 36 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PBGA114 |
| 封裝： | 16 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-537-1, LFBGA-114 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 88K |
| 代理商： | 935266783518 |
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2000 Mar 16
3
Philips Semiconductors
Product specication
36-bit universal bus transceiver with direction pin;
5 V tolerant; 3-state
74ALVCH32501
FUNCTION TABLE
See notes 1 and 2.
Notes
1. A-to-B data flow is shown; B-to-A flow is similar but uses nOEBA, nLEBA and nCPBA.
2. H = HIGH voltage level;
h = HIGH voltage level on set-up time prior to the enable or clock transition;
L = LOW voltage level;
l = LOW voltage level on set-up time prior to the enable or clock transition;
NC = no change;
X = don’t care;
↑ = LOW-to-HIGH enable or clock transition;
↓ = HIGH-to-LOW enable or clock transition;
Z = high impedance OFF-state.
INPUT
INTERNAL
REGISTERS
OUTPUT
OPERATING MODE
nOEAB
nLEAB
nCPAB
nAn
nBn
L
H
X
Z
disabled
L
↓
X
h
l
H
L
Z
disabled; latch data
L
H or L
X
NC
Z
disabled; hold data
L
↑
h
l
H
L
Z
disabled; clock data
H
X
H
L
H
L
H
L
transparent
H
↓
X
h
l
H
L
H
L
latch data and display
H
L
↑
h
l
H
L
H
L
clock data and display
H
L
HorL
X
H
L
H
L
hold data and display
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