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參數(shù)資料
| 型號： | 935263158557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 X 2.70 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 22/67頁 |
| 文件大?。?/td> | 516K |
| 代理商： | 935263158557 |
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Philips Semiconductors
Product specification
P83C557E6/P80C557E6
Single-chip 8-bit microcontroller
1999 Mar 02
29
Figure 28. Serial port control (S0CON) register.
7
6
54
321
0
S0CON (98H)
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
Table 22.
Description of S0CON bits
SYMBOL
BIT
FUNCTION
SM0
S0CON.7
This bit is used to select the serial port mode. See Table 23
SM1
S0CON.6
This bit is used to select the serial port mode. See Table 23
SM2
S0CON.5
Enables the multiprocessor communication feature in modes 2 and 3. In mode 2 or 3, if SM2 is set to
1, then RI will not be activated if the received 9th data bit (RB8) is 0. In mode 1, if SM2 = 1, then RI will
not be activated if a valid stop bit was not received. In mode 0, SM2 should be 0.
REN
S0CON.4
Enables serial reception. Set by software to enable reception. Clear by software to disable reception.
TB8
S0CON.3
The 9th data bit that will be transmitted in modes 2 and 3. Set or clear by software as desired.
RB8
S0CON.2
In modes 2 and 3, RB8 is the 9th data bit that was received. In mode 1, if
SM2 = 0, RB8 is the stop bit that was received. In mode 0, RB8 is not used.
TI
S0CON.1
The transmit interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, or at the beginning
of the stop bit in the other modes, in any serial transmission. Must be cleared by software.
RI
S0CON.0
The receive interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, or halfway through
the stop bit time in the other modes, in any serial reception (except see SM2). Must be cleared by
software.
Table 23.
Description of S0CON bits
SM0
SM1
MODE
DESCRIPTION
BAUD RATE
0
Shift register
fCLK/12
0
1
8–bit UART
variable
1
0
2
9–bit UART
fCLK/64 or fCLK/32
1
3
9–bit UART
variable
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