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參數(shù)資料
| 型號： | 935263158557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 14 X 20 X 2.70 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 20/67頁 |
| 文件大小： | 516K |
| 代理商： | 935263158557 |
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Philips Semiconductors
Product specification
P83C557E6/P80C557E6
Single-chip 8-bit microcontroller
1999 Mar 02
27
Figure 26. Reset/Toggle enable register (RTE).
7
6
54
321
0
RTE (EFH)
TP47
TP46
RP45
RP44
RP43
RP42
RP41
RP40
Table 21.
Description of RTE bits
SYMBOL
BIT
FUNCTION
TP47
RTE.7
If “1” then P4.7 toggles on a match between CM2 and Timer T2
TP46
RTE.6
If “1” then P4.6 toggles on a match between CM2 and Timer T2
RP45
RTE.5
If “1” then P4.5 toggles on a match between CM1 and Timer T2
RP44
RTE.4
If “1” then P4.4 toggles on a match between CM1 and Timer T2
RP43
RTE.3
If “1” then P4.3 toggles on a match between CM1 and Timer T2
RP42
RTE.2
If “1” then P4.2 toggles on a match between CM1 and Timer T2
RP41
RTE.1
If “1” then P4.1 toggles on a match between CM1 and Timer T2
RP40
RTE.0
If “1” then P4.0 toggles on a match between CM1 and Timer T2
For more information concerning the TM2CON, CTCON, TM2IR and
the STE/RTE registers see IC20 handbook, chapter “80C51 family
hardware description”.
Port 4 can be read and written by software without affecting the
toggle, set and reset signals. At a byte overflow of the least
significant byte, or at a 16-bit overflow of the timer/counter, an
interrupt sharing the same interrupt vector is requested. Either one
or both of these overflows can be programmed to request an
interrupt.
All interrupt flags must be reset by software.
Figure 27. Watchdog timer.
Internal Bus
Timer T3
(8-bit)
LOAD LOADEN
Prescaler
(11-bit)
Clear
fCLK/12
EW
WLE
Clear
PD
LOADEN
Internal Bus
Write T3
PCON.4
PCON.1
to reset circuitry (see Figure 46)
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