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參數(shù)資料
| 型號： | 935261617118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PDSO32 |
| 封裝： | 7.50 MM, PLASTIC, SO-32 |
| 文件頁數(shù)： | 9/31頁 |
| 文件大小： | 199K |
| 代理商： | 935261617118 |
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2000 Jan 04
17
Philips Semiconductors
Preliminary specication
Multi-channel lter DAC
UDA1328T
14 DC CHARACTERISTICS
VDDD =VDDA = 3.3 V; Tamb =25 °C; RL =5k. All voltages referenced to ground (pins 3 and 20); unless otherwise
specied.
Notes
1. All supply connections must be made to the same external power supply unit.
2. When the DAC drives a capacitive load above 50 pF, a series resistor of 100
must be used to prevent oscillations
in the output operational amplifier.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VDDA
analog supply voltage
note 1
2.7
3.3
3.6
V
VDDD
digital supply voltage
note 1
2.7
3.3
3.6
V
IDDA
analog supply current
all channels active;
operating mode
28
mA
IDDD
digital supply current
operating mode
11
mA
Digital input pins: 5 V tolerant TTL compatible
VIH
HIGH-level input voltage
2.0
V
VIL
LOW-level input voltage
0.8
V
VIL(th)
LOW-level threshold input voltage;
falling edge
0.9
1.45
V
VIH(th)
HIGH-level threshold input
voltage; rising edge
1.4
1.9
V
Vhyst
Schmitt trigger hysteresis voltage
0.4
0.7
V
I
LI
input leakage current
1
A
Ci
input capacitance
10
pF
Digital output pin
VOH
HIGH-level output voltage
IOH = 2 mA
0.85VDDD
V
VOL
LOW-level output voltage
IOL =2mA
0.4
V
DAC
Vref
reference voltage
referenced to VSSA
0.45VDDA
0.5VDDA
0.55VDDA
V
Io(max)
maximum output current
(THD + N)/S < 0.1%
0.22
mA
RL
load resistance
3
k
CL
load capacitance
note 2
50
pF
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