參數(shù)資料
型號: 935261617118
廠商: NXP SEMICONDUCTORS
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 24-BIT DAC, PDSO32
封裝: 7.50 MM, PLASTIC, SO-32
文件頁數(shù): 8/31頁
文件大小: 199K
代理商: 935261617118
2000 Jan 04
16
Philips Semiconductors
Preliminary specication
Multi-channel lter DAC
UDA1328T
9.3.6
DE-EMPHASIS
A 2-bit value to enable the digital de-emphasis filter.
Table 18 De-emphasis settings
9.3.7
OUTPUT POLARITY CONTROL
A 1-bit value to program the output polarity of the output
signal. This bit must be used together with the CH2 to CH0
bits and the ACH bit to either select the polarity for all
channels or to set for each channel individually.
Table 19 Output polarity control
DE2
DE1
DE0
FUNCTION
0
no de-emphasis
0
1
de-emphasis; 32 kHz
0
1
0
de-emphasis; 44.1 kHz
0
1
de-emphasis; 48 kHz
1
0
de-emphasis; 96 kHz
PLC
FUNCTION
0
non-inverting
1
inverting
10 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Notes
1. All supply connections must be made to the same power supply.
2. Equivalent to discharging a 100 pF capacitor via a 1.5 k
series resistor, expect pin 19 (L3DATA) which can
withstand ESD pulses of
2500 to +2500 V.
3. Equivalent to discharging a 200 pF capacitor via a 0.75
H series inductor.
11 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.
12 THERMAL CHARACTERISTICS
13 QUALITY SPECIFICATION
In accordance with
“SNW-FQ-611-E”. The number of the quality specification can be found in the “Quality Reference
Handbook”.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDDD
digital supply voltage
note 1
5.0
V
VDDA
analog supply voltage
note 1
5.0
V
Txtal(max)
maximum crystal temperature
150
°C
Tstg
storage temperature
65
+125
°C
Tamb
ambient temperature
40
+85
°C
Ves
electrostatic handling
note 2
3000
+3000
V
note 3
250
+250
V
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth(j-a)
thermal resistance from junction to ambient in free air
58
K/W
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