參數(shù)資料
型號(hào)： 935261504557
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP44
封裝： PLASTIC, SOT-307, QFP-44
文件頁數(shù)： 57/87頁
文件大?。?/td> 440K
代理商： 935261504557
1999 Jul 01
60
Philips Semiconductors
Product specication
9-bit video input processor
SAA7113H
15.2.16 SUBADDRESS 0FH
Table 42 Chrominance gain control SA 0F (D6 to D0)
Table 43 Chrominance gain control SA 0F (D7)
15.2.17 SUBADDRESS 10H
Table 44 Format/delay control SA 10 (D2 to D0)
Clear DTO (CDTO)
Disabled
CDTO
0
D7
Every time CDTO is set, the internal subcarrier DTO phase is reset to
0
° and the RTCO output generates a logic 0 at time slot 68 (see
external document
“RTC Functional Description”, available on
request). So an identical subcarrier phase can be generated by an
external device (e.g. an encoder).
CDTO
1
D7
CHROMINANCE GAIN VALUE
(IF ACGC IS SET TO LOGIC 1)
CONTROL BITS D6 TO D0
CGAIN6
CGAIN5
CGAIN4
CGAIN3
CGAIN2
CGAIN1
CGAIN0
Minimum gain (0.5)
0
000000
Nominal gain (1.125)
0
100100
Maximum gain (7.5)
1
111111
AUTOMATIC CHROMINANCE GAIN CONTROL ACGC
D7
ACGC
On
0
Programmable gain via CGAIN6 to CGAIN0
1
LUMINANCE DELAY
COMPENSATION (STEPS IN 2/LLC)
CONTROL BITS D2 TO D0
YDEL2
YDEL1
YDEL0
4...
1
0
...0...
0
...3
0
1
FUNCTION
CHBW/CSTD
BIT
LOGIC
LEVEL
DATA BIT
50 Hz
60 Hz
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