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參數(shù)資料
| 型號： | 935247890551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 畫面疊加 |
| 英文描述： | PICTURE-IN-PICTURE IC, PQFP100 |
| 封裝： | PLASTIC, SOT-317-2, QFP-100 |
| 文件頁數(shù)： | 9/35頁 |
| 文件大?。?/td> | 228K |
| 代理商： | 935247890551 |
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1996 Aug 07
17
Philips Semiconductors
Preliminary specication
Picture-In-Picture (PIP) controller
SAB9077H
SA 08H DISPLAY REDUCTION FACTORS REGISTER
This register sets the display reduction factors,
independent of the acquisition reduction factors.
It sets the PIP size to a certain default value in such a way
that the border drawn around the PIP is just fitting.
SA 09H ACQUISITION REDUCTION FACTORS REGISTER
This register sets the acquisition reduction factors,
independent of the display reduction factors. If the HRED
is 1 to 1 then the VRED must also be 1 : 1.
Restrictions are:
The DREDH and AREDH must be the same
The DREDV is equal or smaller than the AREDV
(e.g DREDV is 1 to 2 and AREDV is 1 : 1).
SA 0AH AND SA 0CH ACQUISITION FINE POSITIONING
REGISTERS
These registers determine the start of the acquisition area.
Horizontal fine positioning can be adjusted with 16 steps of
2 pixels, vertical fine positioning can be adjusted with
256 steps of 1 line/field.
SA 0DH AND SA 0EH SELECTION REGISTERS
The MLSEL and SLSEL bits control which PIP is live.
Both main channel and sub-channel can have one live
PIP. Counting is done from upper-left to lower-right.
The MBSEL and SBSEL bits control which PIP border has
a different colour. Both main and sub-channel can have a
different PIP channel border selection. Counting is done
from upper-left to lower-right.
SA 0FH BORDER SIZE REGISTER
This register controls the border size. The minimum
horizontal border is 2 pixels. The minimum vertical border
is 1 line. The vertical border size is multiplied by the
FH mode number before it is displayed on the screen.
SA 10H AND SA 11H BORDER COLOUR AND BORDER SELECT
COLOUR OF SUB
-CHANNEL REGISTERS (see Table 5)
If SBON is set to logic 1 then the border of the sub-channel
is visible.The SBBRT and SBCOL bits control the
brightness and colour of the sub-channel border colour.
If SBSON is set to logic 1 then one sub-PIP border can
have a different colour. This border is selected by the
SBSEL bits.
The SBSBRT and SBSCOL bits control the brightness and
colour of the sub-border selection colour.
SA 12H AND SA 13H BORDER COLOUR AND BORDER
SELECTION COLOUR OF MAIN CHANNEL REGISTERS
(see Table 5)
If MBON is set to logic 1 then the border of the main
channel is visible.
The MBBRT and MBCOL bits control the brightness and
colour of the main-channel border colour. If MBSON is set
to logic 1 then one main PIP border can have a different
colour. This PIP is selected by the MBSEL bits, the
function can be switched on if MBSON is set to logic 1.
The MBSBRT and MBSCOL bits control the brightness
and colour of the main-border selection colour.
SA 14H BACKGROUND CONTROL REGISTER (see Table 5)
If BGON is set to logic 1 then the background is visible.
The BGBRT and BGCOL bits control the brightness and
colour of the background colour.
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