
1997 Aug 12
8
Philips Semiconductors
Preliminary specication
Frequency Shift Keying (FSK) receiver
UAA3202M
AC CHARACTERISTICS
VCC = 3.5 V; Tamb =25 °C; for application diagram see Fig.11; fi = 433.92 MHz; f= ±25 kHz; fmod = 250 Hz square
wave, i.e. 500 bits/s; unless otherwise specied.
Notes
1. Measured at the RF input connector of the test board.
2. Measured at test point A in Fig.11.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
System performance
Psens
sensitivity
BER
≤ 3%
94
dBm
Pi(max)
maximum input power
BER
≤ 3%
30
dBm
α
rad
spurious radiation
note 1
60
dBm
tst
receiver settling time
Pi =Psens + 10 dB; see Fig.5
25ms
BIF
IF bandwidth range
Pi =Psens + 3 dB
850
1000
1150
kHz
fD
data frequency
140
250
Hz
Mixer
Gmix
mixer conversion gain
31
33
35
dB
Ro(mix)
mixer output resistance
2.7
3
3.3
k
Post mixer amplier
IP3PMA
interception point (mixer + PMA)
note 2
38
35
dBm
GPMA
PMA gain
note 2
9
10.4
12
dB
P<1dB
compression (mixer + PMA)
Pi = 45 dBm
0
1
dBm
BWPMA
PMA LP cut-off frequency
5
MHz
RoPMA
PMA output resistance
1.2
1.4
1.6
k
Limiter
Glim
limiter gain
60
63.5
67
dB
Blim
limiter LP cut-off frequency
2
5
8
MHz
Ri(lim)
limiter input resistance
40
50
60
k
Demodulator
GDMOD
demodulator gain
note 2
0.8
1
1.2
fc(DMOD)
demodulator centre frequency
800
1000
1200
kHz
f
frequency deviation
20
25
70
kHz
Ro(DMOD)
demodulator output resistance
24
30
36
k
Data slicer
BDS
data slicer bandwidth
35
50
kHz
Ro(DS)
data slicer output resistance
120
150
180
k
RSSI comparator
Vo(RSSI)
RSSI output voltage
see Fig.3
Vo(COMP)
COMP output voltage
see Fig.4
Pth(on)
threshold for switching COMP output
voltage to HIGH
99.5 95.5 91.5 dBm
Phys(W)
hysteresis width of COMP output voltage
1
2
4
dBm
mV
kHz
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