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參數(shù)資料
| 型號： | 935225410112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 30/67頁 |
| 文件大?。?/td> | 400K |
| 代理商： | 935225410112 |
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1998 Apr 07
36
Philips Semiconductors
Product specication
8-bit Flash microcontrollers
P89C738; P89C739
16.9.2
DATA polling DQ7
The P89C738 also features DATA polling as a method to
indicate to the host system that the Automatic program or
erase algorithms are either in progress or completed.
While the Automatic programming algorithm is in operation
an attempt to read the device will produce the complement
data of the data last written to DQ7. Upon completion of
the Automatic programming algorithm an attempt to read
the device will produce the true data last written to DQ7.
The DATA polling feature is valid after the rising edge of
the second WE pulse of the two write pulse sequences.
While the Automatic erase algorithm is in operation, DQ7
will read a logic 0 until the erase operation is completed.
Upon completion of the erase operation, the data on DQ7
will read a logic 1. The DATA polling feature is valid after
the rising edge of the second WE pulse of two write pulse
sequences.
The DATA polling feature is active during Automatic
program or erase algorithms.
DATA polling appears in Q7 during programming or erase.
16.10 Write operation
Because of the electronic features of the Flash cell, the
data to be programmed into Flash should be reversed
when programming. In other words, to program 00H the
value FFH must be sent to Port 0.
16.11 System considerations
During the switch between active and standby conditions,
transient current peaks are produced on the rising and
falling edges of CE. The magnitude of these transient
current peaks is dependent on the output capacitance
loading of the device.
A ceramic capacitor of minimum 0.1
F (high frequency,
low inherent inductance) should be used on each device
between VDD and VSS, and between VPP and VSS to
minimize transient effects.
Table 25 Capacitance of pin VPP
Tamb =25 °C; fclk = 1.0 MHz
SYMBOL
PARAMETER
CONDITION
VALUE
CIN
input capacitance
VIN = 0 V
14 pF
COUT
output capacitance
VOUT =0V
16pF
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