參數(shù)資料
型號： 935211970557
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： PLASTIC, SOT-393, QFP-64
文件頁數(shù)： 11/67頁
文件大?。?/td> 443K
代理商： 935211970557
1998 May 15
19
Philips Semiconductors
Product specication
Video Input Processor (VIP)
SAA7111
10 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k
resistor.
11 CHARACTERISTICS
VDDD = 4.5 to 5.5 V; VDDA = 4.75 to 5.25 V; Tamb =25 °C; unless otherwise specied.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDDD
digital supply voltage
0.5
+6.5
V
VDDA
analog supply voltage
0.5
+6.5
V
Vdiff
voltage difference between VSSAall and
VSSall
100
mV
Tstg
storage temperature
65
+150
°C
Tamb
operating ambient temperature
0
70
°C
Tamb(bias)
operating ambient temperature under bias
10
+80
°C
VESD
electrostatic discharge all pins
note 1
2000
+2000
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDD
digital supply current
100
130
160
mA
PD
digital power
0.45
0.65
0.88
W
VDDA
analog supply voltage
4.75
5.0
5.25
V
IDDA
analog supply current
60
70
80
mA
PA
analog power
0.32
0.35
0.38
W
PA+D
analog and digital power
0.77
1.0
1.26
W
Analog part
Iclamp
clamping current
VI = 1.25 V DC
2
A
Vi(p-p)
input voltage (peak-to-peak
value), AC coupling required
coupling
capacitor = 10 nF; note 1
0.55
1.0
1.5
V
|Zi|
input impedance
clamping current off
200
k
Ci
input capacitance
10
pF
αcs
channel crosstalk
fi = 5 MHz
50
dB
Analog-to-digital converters
B
bandwidth
at
3dB
15
MHz
φ
diff
differential phase (amplier
plus anti-alias lter = bypass)
2
deg
Gdiff
differential gain (amplier plus
anti-alias lter = bypass)
2
%
fADC
ADC clock frequency
11
16
MHz
DLE
DC differential linearity error
0.5
LSB
ILE
DC integral linearity error
1
LSB
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