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參數(shù)資料
| 型號(hào)： | 935200940112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDIP52 |
| 封裝： | PLASTIC, SOT-247, SDIP-52 |
| 文件頁(yè)數(shù)： | 6/39頁(yè) |
| 文件大小： | 236K |
| 代理商： | 935200940112 |
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March 1994
14
Philips Semiconductors
Objective specication
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
VIDEO IDENTIFICATION OUTPUT (PIN 4)
VO
output voltage
video not identied
0.5
V
ZO
output impedance
25
k
VO
output voltage
video identied;
colour signal
available;
fosc = 3.5 MHz
6
V
video identied;
colour signal
available/unavailable
;fosc = 4.4 MHz
8
V
td
delay time of identication after
the AGC has stabilized on a new
transmitter
10
ms
I4
maximum load current at pin 4
25
A
Sound circuit
DEMODULATOR INPUT; NOTE 16 (PIN 5)
V5(rms)
input limiting for PLL catching range
(RMS value)
12mV
f
catching range PLL
note 17
4.2
6.8
MHz
RI
DC input resistance
note 3
100
k
CI
input capacitance
note 3
15
pF
AMR
AM rejection
VI = 50 mV RMS;
note 18
60
66
dB
DE-EMPHASIS (PIN 1)
VO(rms)
output signal amplitude (RMS value)
note 17
350
mV
RO
output resistance
15
k
V1
DC output voltage
3
V
AUDIO ATTENUATOR OUTPUT (PIN 50)
V50(rms)
controlled output signal amplitude
(RMS value)
6 dB; note 17
500
700
900
mV
RO
output resistance
250
V50
DC output voltage
3.3
V
THD
total harmonic distortion
note 19
0.5
%
S/Nint
internal signal-to-noise ratio
note 7
60
dB
S/Next
external signal-to-noise ratio
note 7
80
dB
VOLcr
control range
see also Fig.5
80
dB
OSS
suppression of output signal when
mute is active
80
dB
V
50
DC shift of the output when mute is
active
note 20
10
50
mV
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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