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參數(shù)資料
| 型號： | 935163100551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | ATM/SONET/SDH SUPPORT CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 X 1.40 MM, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 179K |
| 代理商： | 935163100551 |
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2000 Sep 29
12
Philips Semiconductors
Product specication
SDH/SONET STM16/OC48 main ampliers
OQ2538HP; OQ2538U
Fig.11 AGC transfer characteristics.
(1) Tamb = 20 °C.
(2) Tamb = +25 °C.
(3) Tamb = +85 °C.
MGE746
0
10
0
203040
100
200
60
80
VAGC VAGCDC
(mV)
50
VIN (mV p-p)
(1)
(2)
(3)
Fig.12 LOS detection characteristics.
(1) Tamb = 20 °C.
(2) Tamb = +25 °C.
(3) Tamb = +85 °C.
0
100
200
VIN (mV p-p)
1
0
357
2468
10 11
9
VLOS VLOSDC
(mV)
MGE747
(1)
(2)
(3)
AGC and AGCDC level detection
When using rectifier A as an input signal level detector, the
AGC and AGCDC pins must be decoupled to ground with
100 nF capacitors. The AGCDC output is intended as a
reference voltage against which the actual AGC output
voltage can be compared. This voltage difference,
VAGC VAGCDC, can be used as a control input in an AGC
loop. A graph depicting output voltage difference as a
function of the input signal level (typical) is shown in
Fig.11. Note that an input signal with the specified
peak-to-peak value is applied to both IN and INQ inputs,
but with complementary phase.
LOS and LOSDC level detection
The output of rectifier B can be used for LOS detection.
The LOSDC output provides a reference voltage against
which the voltage at the LOS output can be compared.
The voltage difference VLOS VLOSDC can be used as
input to a LOS detection circuit. Both outputs need to be
decoupled using 100 nF capacitors. A graph depicting
VLOS VLOSDC as a function of the input signal level
(typical) is shown in Fig.12. Note that an input signal with
the specified peak-to-peak value is applied to both IN and
INQ inputs, but with complementary phase.
Grounding and power supply decoupling
The ground connection on the PCB needs to be a large
copper area fill connected to a common ground plane with
as low inductance as possible, preferably positioned
directly underneath the LQFP48 package. The large area
fill will improve heat transfer to the PCB and thus aid IC
cooling.
All VEE pins (two at each corner) need to be connected to
a common supply plane with as low inductance as
possible. This plane should be decoupled to ground.
To avoid high frequency resonance, multiple bypass
capacitors should not be mounted at the same location.
To minimize low frequency switching noise in the vicinity of
the OQ2538HP, the power supply line should be filtered
once using an LC-circuit with a low cut-off frequency
(see Fig.14).
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