參數(shù)資料
型號: 933841600005
廠商: NXP SEMICONDUCTORS
元件分類: 顯示驅(qū)動器
英文描述: LIQUID CRYSTAL DISPLAY DRIVER, U
封裝: DIE
文件頁數(shù): 22/44頁
文件大小: 192K
代理商: 933841600005
2001 Oct 02
29
Philips Semiconductors
Product specication
Universal LCD driver for low multiplex rates
PCF8576
11 AC CHARACTERISTICS
VDD = 2 to 9 V; VSS =0V; VLCD =VDD 2VtoVDD 9 V; Tamb = 40 to +85 °C; unless otherwise specied.
Notes
1. At fclk < 125 kHz, I2C-bus maximum transmission speed is derated.
2. All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to
VIL and VIH with an input voltage swing of VSS to VDD.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
fclk
oscillator frequency on pin CLK
normal mode
VDD = 5 V; note 1
125
200
288
kHz
power-saving mode
VDD = 3.5 V
21
31
48
kHz
tclkH
CLK HIGH time
see Fig.21
1
s
tclkL
CLK LOW time
1
s
tPSYNC
SYNC propagation delay time
400
ns
tSYNCL
SYNC LOW time
1
s
tPLCD
driver delays with test loads
VLCD =VDD 5 V; see Fig.20
30
s
Timing characteristics: I2C-bus; note 2; see Fig.22
tSW
tolerable spike width on bus
100
ns
tBUF
bus free time
4.7
s
tHD;STA
START condition hold time
4.0
s
tSU;STA
set-up time for a repeated START condition
4.7
s
tLOW
SCL LOW time
4.7
s
tHIGH
SCL HIGH time
4.0
s
tr
SCL and SDA rise time
1
s
tf
SCL and SDA fall time
0.3
s
CB
capacitive bus line load
400
pF
tSU;DAT
data set-up time
250
ns
tHD;DAT
data hold time
0
ns
tSU;STO
set-up time for STOP condition
4.0
s
Fig.20 Test loads.
MBE544
3.3 k
1.5 k
0.5VDD
VDD
SDA,
SCL
CLK
1 nF
BP0 to BP3, and
S0 to S39
(2%)
6.8
VDD
SYNC
(2%)
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