參數(shù)資料
型號： 933841600005
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, U
封裝： DIE
文件頁數(shù)： 16/44頁
文件大?。?/td> 192K
代理商： 933841600005
2001 Oct 02
23
Philips Semiconductors
Product specication
Universal LCD driver for low multiplex rates
PCF8576
Table 4
Denition of PCF8576 commands
COMMAND
OPCODE
OPTIONS
DESCRIPTION
MODE SET
C 1
0
LP
E
B
M1
M0
Table 5
Denes LCD drive mode.
Table 6
Denes LCD bias conguration.
Table 7
Denes display status. The possibility to disable the
display allows implementation of blinking under
external control.
Table 8
Denes power dissipation mode.
LOAD DATA
POINTER
C 0 P5 P4 P3 P2
P1
P0
Table 9
Six bits of immediate data, bits P5 to P0, are
transferred to the data pointer to dene one of forty
display RAM addresses.
DEVICE
SELECT
C 1
1
0
A2
A1
A0
Table 10
Three bits of immediate data, bits A2 to A0, are
transferred to the subaddress counter to dene one of
eight hardware subaddresses.
BANK
SELECT
C 1
1110
I
O
Table 11
Denes input bank selection (storage of arriving
display data).
Table 12
Denes output bank selection (retrieval of LCD display
data). The BANK SELECT command has no effect in
1 : 3 and 1 : 4 multiplex drive modes.
BLINK
C 1
1
0
A
BF1 BF0
Table 13
Denes the blinking frequency.
Table 14
Selects the blinking mode; normal operation with
frequency set by BF1, BF0 or blinking by alternation of
display RAM banks. Alternation blinking does not
apply in 1 : 3 and 1 : 4 multiplex drive modes.
Table 5
MODE SET option 1
Table 6
MODE SET option 2
Table 7
MODE SET option 3
Table 8
MODE SET option 4
Table 9
LOAD DATA POINTER option 1
Table 10 DEVICE SELECT option 1
Table 11 BANK SELECT option 1
LCD DRIVE MODE
BITS
DRIVE MODE
BACKPLANE
M1
M0
Static
1 BP
0
1
1 : 2
MUX (2 BP)
1
0
1 : 3
MUX (3 BP)
1
1 : 4
MUX (4 BP)
0
LCD BIAS
BIT B
1
3bias
0
1
2bias
1
DISPLAY STATUS
BIT E
Disabled (blank)
0
Enabled
1
MODE
BIT LP
Normal mode
0
Power-saving mode
1
DESCRIPTION
BITS
6-bit binary value of 0 to 39 P5 P4 P3 P2 P1 P0
DESCRIPTION
BITS
3-bit binary value of 0 to 7
A2
A1
A0
STATIC
1 : 2 MUX
BIT I
RAM bit 0
RAM bits 0 and 1
0
RAM bit 2
RAM bits 2 and 3
1
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