參數(shù)資料
型號(hào)： 933728090112
廠商： NXP SEMICONDUCTORS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： REAL TIME CLOCK, PDIP16
封裝： 0.300 INCH, PLASTIC, SOT-38-4, DIP-16
文件頁(yè)數(shù)： 28/28頁(yè)
文件大?。?/td> 136K
代理商： 933728090112
2003 Jan 27
9
Philips Semiconductors
Product specication
Clock/calendar with serial I/O
PCF8573
9I2C-BUS PROTOCOL
9.1
Addressing
Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is
always done with the first byte transmitted after the start procedure.
The clock/calendar acts as a slave receiver or slave transmitter. Therefore the clock signal SCL is only an input signal,
but the data signal SDA is a bidirectional line.
The clock/calendar slave address is shown in Fig.8. Bits A0 and A1 correspond to the two hardware address pins A0 and
A1. Connecting these to VDD or VSS allows the device to have 1 of 4 different addresses.
9.2
Clock/calendar READ/WRITE cycles
The I2C-bus configuration for different clock/calendar READ and WRITE cycles is shown in Figs 9, 10 and 11.
The write cycle is used to set the time counter, the alarm register and the flags. The transmission of the clock/calendar
address is followed by the MODE-POINTER-word which contains a CONTROL-nibble (Table 3) and an
ADDRESS-nibble (Table 4). The ADDRESS-nibble is valid only if the preceding CONTROL-nibble is set to EXECUTE
ADDRESS. The third transmitted word contains the data to be written into the time counter or alarm register.
handbook, halfpage
MBL807
msb
lsb
1
0
1
0
A1
A0
R/W
Fig.8 Slave address.
handbook, full pagewidth
S
A
CLOCK/CALENDAR
ADDRESS
AA
DATA
P
acknowledge
from slave
R/W
auto increment
of B1, B0
MBL808
0
MODE POINTER
acknowledge
from slave
acknowledge
from slave
msb
lsb
n bytes
(n = 0, 1, 2, ...)
0 C2 C1 C0 0 B2 B1 B0
Fig.9 Master transmitter transmits to clock/calendar slave receiver.
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