參數(shù)資料
型號(hào): 9250BF-27LFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56
文件頁數(shù): 12/17頁
文件大小: 221K
代理商: 9250BF-27LFT
4
ICS9250-27
0395D—10/25/05
2
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F0
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3
Truth Table
Byte 0: Control Register
(1 = enable, 0 = disable)
t
i
B#
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6
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R0
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(
5
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R0
)
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v
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c
a
n
I
/
e
v
i
t
c
A
(
4
t
i
BD
I
d
e
v
r
e
s
e
R0
)
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v
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t
c
a
n
I
/
e
v
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t
c
A
(
3
t
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B
m
u
r
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a
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r
p
S
)
f
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=
0
/
n
O
=
1
(
1)
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v
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t
c
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I
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v
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t
c
A
(
2
t
i
B6
21
z
H
M
8
41
)
e
v
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t
c
a
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I
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e
v
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t
c
A
(
1
t
i
B5
20
z
H
M
8
41
)
e
v
i
t
c
a
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I
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v
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t
c
A
(
0
t
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B9
42
K
L
C
U
P
C1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
Note: Reserved ID bits must be wirtten as "0".
Byte 1: Control Register
(1 = enable, 0 = disable)
t
i
B#
n
i
Pe
m
a
ND
W
Pn
o
i
t
p
i
r
c
s
e
D
7
t
i
B6
37
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
6
t
i
B7
36
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
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t
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A
(
5
t
i
B9
35
M
A
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D
S1
)
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v
i
t
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a
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I
/
e
v
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A
(
4
t
i
B0
44
M
A
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D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
3
t
i
B2
43
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
2
t
i
B3
42
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
1
t
i
B5
41
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
0
t
i
B6
40
M
A
R
D
S1
)
e
v
i
t
c
a
n
I
/
e
v
i
t
c
A
(
Notes:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be
configured at power-on and are not expected to be configured during the normal modes of operation.
2. PWD = Power on Default
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