參數(shù)資料
型號(hào): 90E32ERGI
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP48
封裝: TQFP-48
文件頁(yè)數(shù): 18/67頁(yè)
文件大?。?/td> 777K
代理商: 90E32ERGI
90E32
POLY-PHASE HIGH-PERFORMANCE WIDE-SPAN ENERGY METERING IC
Function Description
25
August 24, 2011
3.7
EVENT DETECTION
3.7.1
ZERO-CROSSING DETECTION
Zero-crossing detector detects the zero-crossing point of the funda-
mental component of voltage and current for each of the 3 phases.
Zero-crossing signal can be independently configured and output.
Refer to the definition of the ZXConfig register.
3.7.2
SAG DETECTION
Usually in the application the Sag threshold is set to be 78% of the
reference voltage. The 90E32 generates Sag event when there are less
than three 8KHz samples (absolute value) greater than the sag thresh-
old during two continuous 11ms time-window.
For the computation of Sag threshold register value, refer to AN-644.
The Sag event is captured by the SagWarn bit (b3, SysStatus0). If
the corresponding IRQ enable bit the SagWnEn bit (b3, FuncEn0) is set,
IRQ can be generated. Refer to Figure-21.
3.7.3
PHASE LOSS DETECTION
The phase loss detection detects if there is one or more phases’ volt-
age is less than the phase-loss threshold voltage.
The processing and handling is similar to sag detection, only the
threshold is different. The threshold computation flow is also similar. The
typical threshold setting could be 10% Un or less.
If any phase line is detected as in phase-loss mode, that phase’s
zero-crossing detection function (both voltage and current) is disabled.
3.7.4
COMPUTED NEUTRAL LINE OVERCURRENT DETEC-
TION
The neutral line computed current (calculated) RMS is checked with
the threshold defined in the INWarnTh0 register. If the N Line current is
greater than the threshold, the INOv0 bit (b14, SysStatus1) bit is set.
IRQ1 is generated if the corresponding Enable bit the INOv0En bit (b14,
FuncEn1) is set.
3.7.5
PHASE SEQUENCE ERROR DETECTION
The phase sequence is detected in two cases: 3P4W and 3P3W,
which is defined by the 3P3W bit (b8, MMode0).
3P4W case:
Correct sequence: Voltage/current zero-crossing sequence: phase-
A, phase-B and phase-C.
3P3W case:
Correct sequence: Voltage/current zero-crossing between phase-A
and phase-C is greater than 180 degree.
If the above mentioned criteria are violated, it is assumed as a phase
sequence error.
3.8
DC AND CURRENT RMS ESTIMATION
The 90E32 has a module named ‘PMS’ which can estimate current
channel RMS or current channel arithmetic average (DC component).
The measurement type is defined in the PMConfig register. It can be
used to estimate current RMS in Partial Measurement mode. Since the
PMS block only consume very small power, it can be also used to esti-
mate current RMS in Normal mode. The PMS module is turned on in
both Partial Measurement mode and Normal mode.
The result is in different format and different scale for the RMS and
average respectively. The RMS result is unsigned; while current average
is signed.
register definition.
相關(guān)PDF資料
PDF描述
90E36ERGI SPECIALTY ANALOG CIRCUIT, PQFP48
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