參數(shù)資料
型號(hào)： 853013AMLFT
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘及定時(shí)
英文描述： 853013 SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
封裝： 7.50 X 12.80 MM, 2.30 MM HEIGHT, ROHS COMPLIANT, MS-013, MO-119, SOIC-20
文件頁(yè)數(shù)： 14/18頁(yè)
文件大?。?/td> 2109K
代理商： 853013AMLFT
ICS853013
LOW SKEW, DUAL,1-TO-3, DIFFERENTIAL-TO-2.5V, 3.3V, 5V LVPECL/ECL FANOUT BUFFER
IDT / ICS 2.5V, 3.3V, 5V LVPECL/ECL FANOUT BUFFER
5
ICS853013AM REV. B OCTOBER 24, 2008
Table 4E. ECL DC Characteristics, VCC = 0V, VEE = -5.25V to -2.375V; TA = -40°C to 85°C
Input and output parameters vary 1:1 with VCC. VEE can vary +0.925V to -0.5V.
NOTE 1: Outputs terminated with 50
to V
CC – 2V.
NOTE 2: Common mode voltage is defined as VIH.
NOTE 3: For single-ended applications, the maximum input voltage for PCLKx, nPCLKx is VCC + 0.3V
AC Electrical Characteristics
Table 5. AC Characteristics, VCC = 0V, VEE = -5.25V to -2.375V or; VCC = 2.375V to 5.25V, VEE = 0V; TA = -40°C to 85°C
All parameters are measured at f
≤ 1GHz, unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions.
Using the same type of inputs on each device, the outputs are measured at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter
-40°C
25°C
80°C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
VOH
Output High Voltage; NOTE 1
-1.125
-1.025
-0.92
-1.075
-1.005
-0.93
-1.005
-0.97
-0.935
V
VOL
Output Low Voltage; NOTE 1
-1.895
-1.755
-1.62
-1.875
-1.78
-1.685
-1.86
-1.765
-1.67
V
VIH
Input High Voltage (Single-ended)
-1.225
-0.94
-1.225
-0.94
-1.225
-0.94
V
VIL
Input Low Voltage (Single-ended)
-1.87
-1.535
-1.87
-1.535
-1.87
-1.535
V
VPP
Peak-to-Peak Input Voltage
150
800
1200
150
800
1200
150
800
1200
V
VCMR
Input High Voltage Common
Mode Range; NOTE 2, 3
VEE+1.2
0
VEE+1.2
0
VEE+1.2
0
V
IIH
Input
High Current
PCLKA, PCLKB
nPCLKA, nPCLKB
200
A
IIL
Input
Low Current
PCLKA, PCLKB
-10
A
nPCLKA, nPCLKB
-200
A
Symbol
Parameter
-40°C
25°C
80°C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fMAX
Output Frequency
>2
GHz
tPLH
Propagation Delay; Low-to-High;
NOTE 1
300
410
510
330
425
520
360
465
570
ps
tPHL
Propagation Delay; High-to-Low;
NOTE 1
300
410
510
330
425
520
360
465
570
ps
tsk(o)
Output Skew; NOTE 2, 4
40
ps
tsk(odc)
Output Duty Cycle Skew
40
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
250
ps
tjit
Buffer Additive Phase Jitter,
RMS; refer to Additive Phase
Jjitter Section
0.03
ps
tR / tF
Output
Rise/Fall Time
20% to 80%
120
180
250
120
180
250
120
180
250
ps
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