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參數(shù)資料
| 型號： | 7P512CFA4500C25 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | PROM |
| 英文描述： | 256M X 16 FLASH 3V PROM CARD, 250 ns, XMA50 |
| 封裝： | CARD-50 |
| 文件頁數(shù)： | 15/32頁 |
| 文件大?。?/td> | 264K |
| 代理商： | 7P512CFA4500C25 |
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White Electronic Designs Corporation Marlborough, MA (508) 485-4000
CompactFlashTM Cards
CFA45 Series
White Electronic Designs
Parameter
Symbol
Min
Typ
Max
Unit
Level Set before Power On
tset
1
ms
Power on Reset
tpor
10
ms
Reset time
trst
10
ms
RESET TIMING
RESET TIMING DIAGRAM
TRST
TPOR
TSET
CSEL Pin
OE Pin
RDY/BSY Pin
Reset Pin
VCC
POR
(Internal)
Parameter
Symbol
Min
Typ
Max
Unit
Test conditions
CE setup time
tsu(VCC)
100
ms
VCC rising up time
tpr
0.1
100
ms
POWER ON RESET CHARACTERISTICS
All card status are reset automatically when VCC voltage goes over about 2.3 V.
tSU(VCC)
tPR
CE1 , CE2
VCC
Attention for Card Use
In the reset or power off, all register information is
cleared.
All card status are cleared automatically when Vcc
voltage turns below about 2.5V.
Notice that the card insertion/removal should not be
executed during host is active, if the card is used in true
IDE mode.
After the card hard reset, soft reset, or power on reset, the
card cannot access during +READY pin is low level.
Please notice that the card insertion/removal should be
executed after card internal operations are completed
(status register bit 7 turns from 1 to 0).
Before the card insertion Vcc cannot be supplied to the
card. After confirmation that CD1, CD2 pins are inserted,
supply Vcc to the card.
OE must be kept at the Vcc level during power on reset
in memory card mode and I/O card mode. OE must be
kept constantly at the GND level in True IDE mode.
Unused pins of data bus (D0 to D15) signals should not
be opened.
POWER ON RESET TIMING
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