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參數(shù)資料
| 型號(hào)： | 7C187-25 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 16-Bit, Bidirectional Transceiver |
| 中文描述： | 64K的× 1靜態(tài)RAM |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 142K |
| 代理商： | 7C187-25 |
CY7C187
Document #: 38-05044 Rev. **
Page 5 of 9
Read Cycle No. 2
[10, 12]
Notes:
12. Address valid prior to or coincident with CE
transition LOW.
13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Switching Waveforms
50%
50%
DATA VALID
t
RC
t
ACE
t
LZCE
t
PU
DATA OUT
HIGH IMPEDANCE
IMPEDANCE
ICC
ISB
t
HZCE
t
PD
CE
HIGH
t
WC
DATA VALID
DATA UNDEFINED
HIGH IMPEDANCE
t
SCE
t
AW
t
SA
t
PWE
t
HA
t
HD
V
SUPPLY
CURRENT
t
HZWE
t
LZWE
t
SD
CE
WE
DATA IN
DATA OUT
ADDRESS
C187
–
7
C187
–
8
t
WC
DATA VALID
HIGH IMPEDANCE
t
SCE
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
CE
WE
ADDRESS
DATA IN
DATA OUT
C187
–
9
Write Cycle No. 1 (WE Controlled)
[11]
Write Cycle No. 2 (CE Controlled)
[11, 13]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 7C187-35 | 64K x 1 Static RAM |
| 7C192-12 | 64K x 4 Static RAM with Separate I/O |
| 7C192-15 | 64K x 4 Static RAM with Separate I/O |
| 7C192-20 | 64K x 4 Static RAM with Separate I/O |
| 7C192-25 | 64K x 4 Static RAM with Separate I/O |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7C187-35 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:64K x 1 Static RAM |
| 7C187NT | 制造商:Cypress Semiconductor 功能描述: |
| 7C187NT WAF | 制造商:Cypress Semiconductor 功能描述: |
| 7C188A | 制造商:Cypress Semiconductor 功能描述: |
| 7C188A WAF | 制造商:Cypress Semiconductor 功能描述: |
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