參數(shù)資料
型號(hào)： 7C1359A-133
廠商： Cypress Semiconductor Corp.
英文描述： 256K x 18 Synchronous-Pipelined Cache Tag RAM
中文描述： 256 × 18的同步高速緩存標(biāo)記內(nèi)存流水線(xiàn)
文件頁(yè)數(shù)： 15/24頁(yè)
文件大?。?/td> 244K
代理商： 7C1359A-133
CY7C1359A/GVT71256T18
Document #: 38-05120 Rev. **
Page 15 of 24
Electrical Characteristics
Over the Operating Range
Parameter
V
IHD
V
IH
V
Il
IL
I
IL
O
V
OH
V
OH
V
OL
V
CC
V
CCQ
Description
Test Conditions
Min.
1.7
1.7
–
0.3
–
2
–
2
2.4
1.7
Max.
V
CC
+0.3
4.6
0.8
2
2
Unit
V
V
V
μ
A
μ
A
V
Input High (Logic 1) Voltage
[15, 21]
Data Inputs (DQxx)
All Other Inputs
Input Low (Logic 0) Voltage
[15, 21]
Input Leakage Current
[22]
Output Leakage Current
Output High Voltage
[15, 23]
0V <
V
IN
< V
CC
Output(s) disabled, 0V < V
OUT
< V
CC
I
OH
=
–
4.0 mA at V
CCQ
= 3.135V
I
OH
=
–
4.0 mA at V
CCQ
= 2.375V
I
OL
= 8.0 mA
Output Low Voltage
[15, 23]
Supply Voltage
[15]
I/O Supply Voltage
[15]
0.4
3.6
V
CC
V
V
V
3.135
2.375
Parameter
I
CC
Description
Power Supply
Current:
Operating
[24, 25, 26]
CMOS Standby
[25, 26]
Conditions
Typ.
100
166
MHz/
-6
310
150
MHz/
-6.7
275
133
MHz/
-7.5
250
100
MHz/
-10
190
Unit
mA
Device selected; all inputs < V
IL
or > V
IH
;
cycle time > t
KC
min.; V
CC
= Max.;
outputs open
Device deselected; V
CC
= Max.;
all inputs < V
SS
+ 0.2 or > V
CC
–
0.2;
all inputs static; CLK frequency = 0
Device deselected; all inputs < V
IL
or > V
IH
; all inputs static;
V
CC
= Max.; CLK frequency = 0
Device deselected;
all inputs < V
IL
or > V
IH
; V
CC
= Max.;
CLK cycle time > t
KC
min.
I
SB2
5
10
10
10
10
mA
I
SB3
TTL Standby
[25, 26]
10
20
20
20
20
mA
I
SB4
Clock Running
[25, 26]
40
80
70
60
50
mA
Capacitance
[17]
Parameter
Description
Test Conditions
T
A
= 25
°
C, f = 1 MHz,
V
CC
= 3.3V
Typ.
4
7
Max.
5
8
Unit
pF
pF
C
I
C
O
Input Capacitance
Input/Output Capacitance (DQ)
Thermal Resistance
Description
Test Conditions
Symbol BGA Typ. TQFP Typ.
Unit
Thermal Resistance (Junction to Ambient) Still Air, soldered on a 4.25 x 1.125 inch,
4-layer PCB
Θ
JA
Θ
JC
19
25
°
C/W
Thermal Resistance (Junction to Case)
9
9
°
C/W
Note:
21. Overshoot: V
IH
≤
+6.0V for t
≤
t
KC
/2.
Undershoot:V
≤
–
2.0V for t
≤
t
/2.
22. MODE pin has an internal pull-up and ZZ pin has an internal pull-down. These two pins exhibit an input leakage current of ±30
μ
A.
23. AC I/O curves are available upon request.
24. I
CC
is given with no output current. I
increases with greater output loading and faster cycle times.
25.
“
”
means the device is in Power-Down mode as defined in the truth table.
“
Device Selected
”
means the device is active.
26. Typical values are measured at 3.3V, 25
°
C, and 8.5-ns cycle time.
相關(guān)PDF資料
PDF描述
7C1359A-150 256K x 18 Synchronous-Pipelined Cache Tag RAM
7C1359A-166 256K x 18 Synchronous-Pipelined Cache Tag RAM
7C185-12 8K x 8 Static RAM
7C185-15 IC 16-BIT BUFF/LINE DRV 48 TSSOP
7C185-20 8K x 8 Static RAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
7C1359A-150 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:256K x 18 Synchronous-Pipelined Cache Tag RAM
7C1359A-166 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:256K x 18 Synchronous-Pipelined Cache Tag RAM
7C1359AP 制造商:Cypress Semiconductor 功能描述:
7C135CT 制造商:Cypress Semiconductor 功能描述:
7C13600C-250AZC 制造商:Cypress Semiconductor 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*