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參數(shù)資料
| 型號： | 74F597 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit shift register with input storage registers(帶輸入存儲(chǔ)寄存的8位移位寄存器（三態(tài)）) |
| 中文描述： | 8位輸入存儲(chǔ)寄存器移位寄存器（帶輸入存儲(chǔ)寄存的8位移位寄存器（三態(tài)）） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 97K |
| 代理商： | 74F597 |
Philips Semiconductors
Product specification
74F50109
Synchronizing dual J–K positive edge-triggered
flip-flop with metastable immune characteristics
September 14, 1990
8
AC WAVEFORMS
V
M
V
M
CPn
V
M
V
M
V
M
V
M
V
M
V
M
t
su
(H)
t
h
(H)
Jn, Kn
Qn
V
M
t
w
(H)
1/f
max
t
su
(L)
t
h
(L)
V
M
V
M
t
PLH
Qn
t
w
(L)
t
PHL
t
PHL
t
PLH
SF00139
Waveform 1. Propagation delay for data to output, data
setup time and hold times, and clock
width, and maximum clock frequency
SDn or RDn
V
M
V
M
t
rec
CPn
SF00603
Waveform 3. Recovery time for set or reset to output
V
M
V
M
RDn
V
M
Qn
V
M
V
M
V
M
t
PLH
Qn
t
w
(L)
t
PHL
t
PHL
t
PLH
SDn
V
M
V
M
t
w
(L)
SF00050
Waveform 2. Propagation delay for set and reset to output,
set and reset pulse width
Qn, Qn
V
M
V
M
t
sk(o)
Qn, Qn
SF00590
Waveform 4. Output skew
NOTES:
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for
predictable output performance.
TEST CIRCUIT AND WAVEFORM
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
2.5ns
t
THL
2.5ns
1MHz
500ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
C
L
=
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
SF00006
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