- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄360430 > 74F2373 (NXP Semiconductors N.V.) Octal transparent latch with 30Ωequivalent output termination (3-State)(帶30Ω等值輸出終端電阻的八透明鎖存器（三態(tài)）) PDF資料下載
參數(shù)資料
| 型號(hào)： | 74F2373 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Octal transparent latch with 30Ωequivalent output termination (3-State)(帶30Ω等值輸出終端電阻的八透明鎖存器（三態(tài)）) |
| 中文描述： | 八路透明鎖存30Ωequivalent輸出端接（3態(tài)）（帶30Ω等值輸出終端電阻的八透明鎖存器（三態(tài)）） |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | 74F2373 |
Philips Semiconductors
Octal transparent latch with 30
equivalent output
termination (3-State)
Product specification
74F2373
1999 Feb 01
5
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST
UNIT
CONDITION
MAX
MAX
t
PLH
t
PHL
Propagation delay
Dn to Qn
Waveform 2
3.0
2.0
5.3
3.7
8.0
6.0
3.0
2.0
9.0
7.0
ns
t
PLH
t
PHL
t
PZH
t
PZL
Propagation delay
E to Qn
Waveform 1
5.0
3.0
9.0
4.0
12.0
8.0
5.0
3.0
12.5
8.5
ns
Output enable time
to high or low level
Waveform 4
Waveform 5
2.0
2.0
5.0
5.6
12.0
8.0
2.0
2.0
12.5
8.5
ns
t
PHZ
t
PLZ
Output disable time
from high or low level
Waveform 4
Waveform 5
2.0
2.0
4.5
3.8
6.5
5.5
2.0
2.0
7.5
6.5
ns
AC SETUP REQUIREMENTS
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST
UNIT
CONDITION
MAX
MAX
t
su
(H)
t
su
(L)
Setup time, high or low level
Dn to E
Waveform 3
0
1.0
0
1.0
ns
t
h
(H
)
t
h
(
L
)
t
w
(H)
Hold time, high or low level
Dn to E
Waveform 3
3.0
3.0
3.0
3.0
ns
E Pulse width, high
Waveform 1
3.5
4.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
t
PHL
E
V
M
V
M
V
M
t
w
(H)
V
M
V
M
Qn
t
PLH
SF00259
Waveform 1. Propagation delay for enable to output
and enable pulse width
Dn
V
M
V
M
V
M
V
M
t
PHL
t
PLH
Qn
SF00260
Waveform 2. Propagation delay for data to output
V
M
V
M
V
M
V
M
V
M
V
M
t
su
(L)
t
h
(L)
t
su
(H)
t
h
(H)
E
Dn
SF00261
Waveform 3. Data setup time and hold times
Qn, Qn
V
M
V
M
V
M
t
PHZ
t
PZH
OEn
V
OH
-0.3V
0V
SF00263
Waveform 4. 3-State output enable time to high level
and output disable time from high level
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F240AD | Dual 4-Bit Inverting Buffer/Driver |
| 74F240AN | Dual 4-Bit Inverting Buffer/Driver |
| 74F240D | Dual 4-Bit Inverting Buffer/Driver |
| 74F240DB | Dual 4-Bit Inverting Buffer/Driver |
| 74F240DC | Dual 4-Bit Inverting Buffer/Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F240 | 制造商:National Semiconductor 功能描述:74F240 |
| 74F240_04 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Octal Buffers/Line Drivers with 3-STATE Outputs |
| 74F240A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Octal inverter buffer 3-State |
| 74F240AD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 4-Bit Inverting Buffer/Driver |
| 74F240AN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 4-Bit Inverting Buffer/Driver |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。