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參數(shù)資料
| 型號(hào)： | 73S1210F-68M/F/PG |
| 廠商： | Maxim Integrated |
| 文件頁(yè)數(shù)： | 99/126頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SOC SMART CARD READER 68QFN |
| 標(biāo)準(zhǔn)包裝： | 260 |
| 系列： | * |
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73S1210F Data Sheet
DS_1210F_001
74
Rev. 1.4
PLL
ETU Divider
12 bits
FI Decoder
DIV
by
2
ETUCLK
CLK
DIV
by
2
SCLK
Pre-Scaler
6 bits
Pre-Scaler
6 bits
F/D Register
SCCLK(5:0)
SCSCLK(5:0)
MSCLK
MSCLKE
MCLK =
96MHz
FDReg(3:0)
FDReg(7:4)
9926
1/744
3.69M
1/13
7.38M
3.69M
7.38M
Defaults
in Italics
SCSel(3:2)
1/13
SYNC
CENTER
EDGE
Figure 18: Smart Card CLK and ETU Generation
There are two, two-byte FIFOs that are used to buffer transmit and receive data. During a T=0 processing,
if a parity error is detected by the 73S1210F during message reception, an error signal (BREAK) will be
generated to the smart card. The byte received will be discarded and the firmware notified of the error.
Break generation and receive byte dropping can be disabled under firmware control. During the
transmission of a byte, if an error signal (BREAK) is detected, the last byte is retransmitted again and the
firmware notified. Retransmission can be disabled by firmware. When a correct byte is received, an
interrupt is generated to the firmware, which then reads the byte from the receive FIFO. Receive overruns
are detected by the hardware and reported via an interrupt. During transmission of a message, the
firmware will write bytes into the transmit FIFO. The hardware will send them to the smart card. When the
last byte of a message has been written, the firmware will need to set the LASTTX bit in the STXCtl SFR.
This will cause the hardware to insert the CRC/LRC if in a T=1 protocol mode. CRC/LRC
generation/checking is only provided during T=1 processing. Firmware will need to instruct the smart
function to go into receive mode after this last transmit data byte if it expects a response from the smart
card. At the end of the smart card response, the firmware will put the interface back into transmit mode if
appropriate.
The hardware can check for the following card-related timeouts:
Character Waiting Time (CWT)
Block Waiting Time (BWT)
Initial Waiting Time (IWT)
The firmware will load the Wait Time with the appropriate value for the operating mode at the appropriate
time. Figure 19 shows the guard, block, wait and ATR time definitions. If a timeout occurs, an interrupt
will be generated and the firmware can take appropriate recovery steps. Support is provided for adding
additional guard times between characters using the Extra Guard Time register (EGT), and between the
last byte received by the 73S1210F and the first byte transmitted by the 73S1210F using the Block Guard
Time register (BGT). Other than the protocol checks described above, the firmware is responsible for all
protocol checking and error recovery.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73S1210F-68MR/F/PG | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| 73S1210F-68MR/F/PH | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| 73S1210F-68MR/F/PJ | 功能描述:80515 73S12xx Microcontroller IC 8-Bit 24MHz 32KB (32K x 8) FLASH 68-QFN (8x8) 制造商:maxim integrated 系列:73S12xx 包裝:帶卷（TR） 零件狀態(tài):要求報(bào)價(jià) 核心處理器:80515 核心尺寸:8-位 速度:24MHz 連接性:I2C，智能卡，UART/USART 外設(shè):LED，POR，WDT I/O 數(shù):8 程序存儲(chǔ)容量:32KB（32K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:2K x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 6.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 85°C（TA） 封裝/外殼:68-VFQFN 裸露焊盤 供應(yīng)商器件封裝:68-QFN（8x8） 標(biāo)準(zhǔn)包裝:2,500 |
| 73S1210F-EB | 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
| 73S1210F-EB-Lite | 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd Lite w/Doc Cd, Cable RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓: |
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