- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369230 > 68HC05PL4 (Motorola, Inc.) 8-Bit Microcontroller Units (MCU).(8位微控制器) PDF資料下載
參數(shù)資料
| 型號： | 68HC05PL4 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數(shù)： | 81/98頁 |
| 文件大?。?/td> | 1019K |
| 代理商： | 68HC05PL4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁當(dāng)前第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
April 30, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05PL4
REV 2.0
INSTRUCTION SET
MOTOROLA
12-13
SUB #opr
SUB opr
SUB opr
SUB oprX
SUB oprX
SUB ,X
Subtract Memory
Byte from
Accumulator
A
←
(A) – (M)
— —
IMM
DIR
EXT
IX2
IX1
IX
A0
B0
C0
D0
E0
F0
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
SWI
Software Interrupt
PC
←
(PC) + 1; Push (PCL)
SP
←
(SP) – 1; Push (PCH)
SP
←
(SP) – 1; Push (X)
SP
←
(SP) – 1; Push (A)
SP
←
(SP) – 1; Push (CCR)
SP
←
(SP) – 1; I
←
1
PCH
←
Interrupt Vector High Byte
PCL
←
Interrupt Vector Low Byte
— 1 — — —
INH
83
10
TAX
Transfer
Accumulator to
Index Register
X
←
(A)
— — — — —
INH
97
2
TST opr
TSTA
TSTX
TST oprX
TST ,X
Test Memory Byte
for Negative or Zero
(M) – $00
— — — — —
DIR
INH
INH
IX1
IX
3D
4D
5D
6D
7D
dd
ff
4
3
3
5
4
TXA
Transfer Index
Register to
Accumulator
Stop CPU Clock and
Enable
Interrupts
A
←
(X)
— — — — —
INH
9F
2
WAIT
— — —
INH
8F
2
A
C
CCR
dd
dd rr
DIR
ee ff
EXT
ff
H
hh ll
I
ii
IMM
INH
IX
IX1
IX2
M
N
n
Accumulator
Carry/borrow flag
Condition code register
Direct address of operand
Direct address of operand and relative offset of branch instruction
Direct addressing mode
High and low bytes of offset in indexed, 16-bit offset addressing
Extended addressing mode
Offset byte in indexed, 8-bit offset addressing
Half-carry flag
High and low bytes of operand address in extended addressing
Interrupt mask
Immediate operand byte
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Memory location
Negative flag
Any bit
opr
PC
PCH
PCL
REL
rel
rr
SP
X
Z
#
∧
∨
⊕
( )
–( )
←
:
¤
—
Operand (one or two bytes)
Program counter
Program counter high byte
Program counter low byte
Relative addressing mode
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
Index register
Zero flag
Immediate value
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Loaded with
If
Concatenated with
Set or cleared
Not affected
Table 12-6. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
H I N Z C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 68HC05PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4 | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC908JB8FS | Freescale Semiconductor, Inc. |
| 69190-405 | 50/100M SOT-23 CMOS RF LDO REGULATORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 68HC05PL4B | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Industry standard 8-bit M68HC05 CPU core |
| 68HC05SB7 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05V12 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| 68HC05X1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC070KH12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8 BIT MICROCONTROLLER UNITS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。