- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369230 > 68HC05PL4 (Motorola, Inc.) 8-Bit Microcontroller Units (MCU).(8位微控制器) PDF資料下載
參數(shù)資料
| 型號(hào)： | 68HC05PL4 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數(shù)： | 59/98頁 |
| 文件大?。?/td> | 1019K |
| 代理商： | 68HC05PL4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁當(dāng)前第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
April 30, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05PL4
REV 2.0
16-BIT PROGRAMMABLE TIMER
MOTOROLA
9-9
OCIE - OUTPUT COMPARE INTERRUPT ENABLE
This read/write bit enables interrupts caused by an active signal on the TCMP
pin. Reset clears the OCIE bit.
1 =
Output compare interrupts enabled.
0 =
Output compare interrupts disabled.
TOIE - TIMER OVERFLOW INTERRUPT ENABLE
This read/write bit enables interrupts caused by a timer overflow. Reset clears
the TOIE bit.
1 =
Timer overflow interrupts enabled.
0 =
Timer overflow interrupts disabled.
IEDG - INPUT CAPTURE EDGE SELECT
The state of this read/write bit determines whether a positive or negative transi-
tion on the TCAP pin triggers a transfer of the contents of the timer register to
the input capture register. Resets have no effect on the IEDG bit.
1 =
Positive edge (low to high transition) triggers input capture.
0 =
Negative edge (high to low transition) triggers input capture.
OLVL - OUTPUT COMPARE OUTPUT LEVEL SELECT
The state of this read/write bit determines whether a logic one or a logic zero
appears on the TCMP when a successful output compare occurs. Resets clear
the OLVL bit.
1 =
TCMP goes high on output compare.
0 =
TCMP goes low on output compare.
9.5.1 Miscellaneous Control and Status Register for Timer16
The Miscellaneous Control and Status Register shown in
Figure 9-11
performs
the following functions:
Configure the I/O port pin PA2 as input pin for TCAP signal
Configure the I/O port pin PA3 as output pin for TCMP signal
TCAPEN - TIMER INPUT CAPTURE ENABLE
The bit configures port pin PA2 for Timer16 input capture function (TCAP). At
power-on-reset, this bit is cleared, PA2 is a standard I/O port pin, TCAP to the
Timer16 is pulled high.
1 =
PA2 pin configured as TCAP for timer input capture
0 =
PA2 pin as standard I/O port pin
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
0
BIT 2
BIT 1
BIT 0
MICSR
$001C
R
W
IRQEN
IRQS
TCMPEN TCAPEN
LED
COPON
POR
reset:
0
0
0
0
0
0
0
1
Figure 9-11. Miscellaneous Control and Status Register (MISCR)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 68HC05PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4 | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC908JB8FS | Freescale Semiconductor, Inc. |
| 69190-405 | 50/100M SOT-23 CMOS RF LDO REGULATORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 68HC05PL4B | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Industry standard 8-bit M68HC05 CPU core |
| 68HC05SB7 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05V12 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| 68HC05X1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC070KH12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8 BIT MICROCONTROLLER UNITS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。