- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369230 > 68HC05PL4 (Motorola, Inc.) 8-Bit Microcontroller Units (MCU).(8位微控制器) PDF資料下載
參數(shù)資料
| 型號： | 68HC05PL4 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數(shù)： | 56/98頁 |
| 文件大?。?/td> | 1019K |
| 代理商： | 68HC05PL4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁當(dāng)前第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
GENERAL RELEASE SPECIFICATION
April 30, 1998
MOTOROLA
9-6
16-BIT PROGRAMMABLE TIMER
MC68HC05PL4
REV 2.0
The result obtained by an input capture will be one count higher than the value of
the free-running timer counter preceding the external transition. This delay is
required for internal synchronization. Resolution is affected by the prescaler,
allowing the free-running timer counter to increment once every four internal clock
cycles (eight oscillator clock cycles).
Reading the ICRH inhibits further captures until the ICRL is also read. Reading
the ICRL after reading the timer status register (TSR) clears the ICF flag bit. does
not inhibit transfer of the free-running counter. There is no conflict between read-
ing the ICRL and transfers from the free-running timer counters. The input capture
registers always contain the free-running timer counter value which corresponds
to the most recent input capture.
NOTE
To prevent interrupts from occurring between readings of the ICRH and ICRL, set
the I bit in the condition code register (CCR) before reading ICRH and clear the I
bit after reading ICRL.
9.4
OUTPUT COMPARE REGISTERS
The Output Compare function is a means of generating an output signal when the
16-bit timer counter reaches a selected value as shown in
Figure 9-8
. Software
writes the selected value into the output compare registers. On every fourth inter-
nal clock cycle (every eight oscillator clock cycle) the output compare circuitry
compares the value of the free-running timer counter to the value written in the
output compare registers. When a match occurs, the timer transfers the output
level (OLVL) from the timer control register (TCR) to the TCMP.
Software can use the output compare register to measure time periods, to gener-
ate timing delays, or to generate a pulse of specific duration or a pulse train of
specific frequency and duty cycle on the TCMP.
BIT 7
ICRH7
BIT 6
ICRH6
BIT 5
ICRH5
BIT 4
ICRH4
BIT 3
ICRH3
BIT 2
ICRH2
BIT 1
ICRH1
BIT 0
ICRH0
ICRH
$0014
R
W
reset:
U
U
U
U
U
U
U
U
ICRL
$0015
R
W
ICRL7
ICRL6
ICRL5
ICRL4
ICRL3
ICRL2
ICRL1
ICRL0
reset:
U
U
U
U
U
U
U
U
U = UNAFFECTED BY RESET
Figure 9-7. Input Capture Registers (ICRH, ICRL)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 68HC05PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4 | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC705PL4B | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 68HC908JB8FS | Freescale Semiconductor, Inc. |
| 69190-405 | 50/100M SOT-23 CMOS RF LDO REGULATORS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 68HC05PL4B | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Industry standard 8-bit M68HC05 CPU core |
| 68HC05SB7 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC05V12 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| 68HC05X1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION (General Release) |
| 68HC070KH12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8 BIT MICROCONTROLLER UNITS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。