
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
B-4
MC68HC05J5A
REV 2.1
B.4
BOOTSTRAP MODE
Bootloader mode is entered upon the rising edge of RESET if the IRQ/V
at V
TST
and the PB0 pin is at logic zero. The Bootloader program is masked in the
ROM area from $0E00 to $0FEF. This program handles copying of user code from
an external EPROM into the on-chip EPROM. The bootload function has to be
done from an external EPROM. The bootloader performs one programming pass
at 1ms per byte then does a verify pass.
The user code must be a one-to-one correspondence with the internal EPROM
addresses.
PP
pin is
B.5
EPROM PROGRAMMING
Programming the on-chip EPROM is achieved by using the Program Control Reg-
ister located at address $3E.
Please contact Motorola for programming board availability.
B.5.1 EPROM Program Control Register (PCR)
This register is provided for programming the on-chip EPROM in the
MC68HC705J5A.
MORON – Mask Option Register ON
0 =
Disable programming to Mask Option Register ($0200 & $0201)
1 =
Enable programming to Mask Option Register ($0200 & $0201)
ELAT – EPROM LATch control
0 =
EPROM address and data bus configured for normal reads
1 =
EPROM address and data bus configured for programming (writes
to EPROM cause address and data to be latched). EPROM is in
programming mode and cannot be read if ELAT is 1. This bit should
not be set when no programming voltage is applied to the V
pp
pin.
PGM – EPROM ProGraM command
0 =
Programming power is switched OFF from EPROM array.
1 =
Programming power is switched ON to EPROM array. If ELAT
then PGM = 0.
≠
1,
Bits [7:3] – Reserved
These are reserved bits and should remain zero.
BIT 7
0
R
0
R
BIT 6
0
R
0
BIT 5
0
R
0
BIT 4
0
R
0
BIT 3
0
R
0
BIT 2
BIT 1
BIT 0
PCR
$001E
R
W
MORON
ELAT
PGM
reset:
0
0
0
= Reserved