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參數(shù)資料
| 型號： | 54F74DC |
| 英文描述： | FLIP-FLOP|DUAL|D TYPE|F-TTL|DIP|14PIN|CERAMIC |
| 中文描述： | 觸發(fā)器|雙| D型|架F - TTL電|雙酯| 14PIN |陶瓷 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 16K |
| 代理商： | 54F74DC |
Original Creation Date: 06/25/97
Last Update Date: 07/08/97
Last Major Revision Date: 06/25/97
CN54F74-X REV 0A0
MICROCIRCUIT DATA SHEET
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP
General Description
The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary
(Q/Q) outputs. Information at the input is transferred to the outputs on the positive
edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse
and is not directly related to the transition time of the positive-going pulse. After the
Clock Pulse Input threshold voltage has been passed, the Data inputs is locked out and
information present will not be transferred to the outputs until the next rising edge of
the Clock Pulse input.
Asynchronous Inputs:
LOW Input to Sd sets Q to HIGH level
LOW Input to Cd sets Q to LOW level
Clear and Set are Independent of clock
Simultaneous LOW on Cd and Sd makes both Q and Q HIGH
NS Part Numbers
54F74DC
Industry Part Number
54F74
Prime Die
M074
Processing
Quality Conformance Inspection
Subgrp Description Temp ( C)
1
2
3
4
5
6
7
8A
8B
9
10
11
Static tests at
Static tests at
Static tests at 0
Dynamic tests at
Dynamic tests at
Dynamic tests at 0
Functional tests at +25
Functional tests at
Functional tests at 0
Switching tests at +25
Switching tests at
Switching tests at 0
+25
+70
+25
+70
+70
+70
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 54F74DM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual D-Type Positive Edge-Triggered Flip-Flop |
| 54F74DMQB | 制造商:Texas Instruments 功能描述: |
| 54F-74F533 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs |
| 54F74FM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual D-Type Positive Edge-Triggered Flip-Flop |
| 54F74FMQB | 制造商:QP Semiconductor 功能描述:NSC F74/M DIE |
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