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參數(shù)資料
| 型號： | 54HC244 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | HC240: INVERTED - HC241/244 NON INVERTED OCTAL BUS BUFFER WITH 3 STATE OUTPUTS |
| 中文描述： | HC240：倒立- HC241/244非反相八路總線緩沖器3態(tài)輸出 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 270K |
| 代理商： | 54HC244 |
M54HC240/241/244
M74HC240/241/244
October 1993
HC240: INVERTED - HC241/244 NON INVERTED
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
o
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
INL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 6 mA (MIN)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2V to 6V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS240/241/244
OCTAL BUS BUFFERWITH3 STATE OUTPUTS
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXF1R
M74HCXXXB1R
M74HCXXXM1R
M74HCXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTION
(top view)
.
HIGH SPEED
t
PD
= 10 ns(TYP.) at V
CC
= 5V
DESCRIPTION
The M54/74HC240, HC241 and HC244 are high
speed CMOSOCTAL BUS BUFFERs fabricated in
silicon gate C
2
MOS technology.
They have the same high speed performance of
LSTTL combined with true CMOS low power
consumption.
The designer has a choise of select combination of
inverting and non-inverting outputs, symmetrical G
(active
low
output
control)
input,
and
complementary G and G inputs. Each control input
governsfour BUS BUFFERs.
These devices are designed to be used with 3state
memory address drivers, etc. All inputs are
equipped with protection circuits against static
discharge and transient excess voltage.
HC244
HC241
HC240
1/12
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