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參數(shù)資料
| 型號(hào)： | 522923D |
| 英文描述： | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| 中文描述： | 集成電路 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 418K |
| 代理商： | 522923D |
11
LTC1286/LTC1298
APPLICATIO
I
FOR
ATIO
U
W
U
U
Figure 2. LTC1298 Operating Sequence Example: Differential Inputs (CH
+
, CH
–
)
CLK
CS
t
CYC
B5
B6
B7
B8
B9
B10
B11
(MSB)
HI-Z
D
OUT
t
CONV
t
DATA
HI-Z
t
suCS
NULL
BIT
B4
B3
B2
B1
POWER
DOWN
B0*
t
SMPL
(MSB)
CLK
START
ODD/
SIGN
SGL/
DIFF
CS
t
CYC
B11
B5
B6
B7
B8
B9
B10
B11
HI-Z
D
OUT
D
IN
t
CONV
t
DATA
HI-Z
t
suCS
NULL
BIT
MSBF
LTC1286/98 F02
B4
B3
B3
B4
B5
B6
B7
B2
B2
B1
B0 B1
B10
B9
B8
t
SMPL
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,
THE ADC WILL OUTPUT ZEROS INDEFINITELY.
t
DATA
: DURING THIS TIME, THE BIAS CIRCUIT AND THE COMPARATOR POWER DOWN AND THE REFERENCE INPUT
BECOMES A HIGH IMPEDANCE NODE, LEAVING THE CLK RUNNING TO CLOCK OUT LSB-FIRST DATA OR ZEROES.
DON'T CARE
START
ODD/
SIGN
D
IN
DON'T CARE
SGL/
DIFF
MSBF
*
POWER DOWN
MSB-First Data (MSBF = 0)
MSB-First Data (MSBF = 1)
D
IN
1
D
IN
2
D
OUT
1
D
OUT
2
CS
SHIFT MUX
ADDRESS IN
1 NULL BIT
SHIFT A/D CONVERSION
RESULT OUT
LTC1096/98 AI01
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